Date: Tue, 4 Feb 2014 18:23:08 -0600 From: Jim Thompson <jim@netgate.com> To: =?windows-1252?Q?=22C=2E_Bergstr=F6m=22?= <cbergstrom@pathscale.com> Cc: Thomas Zander <riggs@freebsd.org>, freebsd-hackers@freebsd.org, Baptiste Daroussin <bapt@FreeBSD.org> Subject: Re: opteron a1100 arm Message-ID: <8537A333-176E-4DF4-A712-2ADFE1B75338@netgate.com> In-Reply-To: <52F16BA4.4060202@pathscale.com> References: <alpine.BSF.2.00.1401311911120.2427@wojtek.tensor.gdynia.pl> <1391538649.19169.79261269.3C5F49D1@webmail.messagingengine.com> <CAFU734xXWyc_TqBJ7e4MhD2nB01BAejR_1vT9%2B_5Ar5mJncncA@mail.gmail.com> <493DEB39-C4B4-409E-B8B2-B1B11E013754@netgate.com> <20140204223528.GF23872@ithaqua.etoilebsd.net> <52F16BA4.4060202@pathscale.com>
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On Feb 4, 2014, at 4:37 PM, C. Bergstr=F6m <cbergstrom@pathscale.com> = wrote: > I don't track the Atom family and not sure if C2000 is the new = out-of-order version, but until that is available - this is no = comparison by a long shot. Yes, the C2000 SoCs and Bay Trail are Silvermont architecture. = Silvermont has OOE and a better branch predictor than did Bonnell or = Saltwell. At 22nm, Intel had enough die area to just add in more cores rather than = rely on =93hyper threading" for better threaded performance so Hyper = Threading isn=92t part of this SoC. The ISA is roughly Westmere (think 2010 Core architecture). AES-NI, SSE4.1/4.2 = and extended page tables (so: bhyve) are all =91in there=92. > Also 5w on the cpu package could easily be made up for in a superior = motherboard and chassis design. Think about how much power interconnects = takes, PCIe and everything else.. That=92s why the infrastructure guys ( =95 Dell, HP, NEC, Ericsson, = Quanta, Supermicro, etc) are building micro server systems with 450 = =91nodes=92 per rack.=
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