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From: Andrew Turner <andrew@FreeBSD.org>
Date: Tue, 31 May 2016 17:49:47 +0000 (UTC)
To: src-committers@freebsd.org, svn-src-all@freebsd.org,
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Subject: svn commit: r301060 - head/sys/arm/arm
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Author: andrew
Date: Tue May 31 17:49:47 2016
New Revision: 301060
URL: https://svnweb.freebsd.org/changeset/base/301060

Log:
  Bin interrupts to the correct CPU when we boot on a non-zero CPU.
  
  Obtained from:	ABT Systems Ltd
  Sponsored by:	The FreeBSD Foundation

Modified:
  head/sys/arm/arm/gic.c

Modified: head/sys/arm/arm/gic.c
==============================================================================
--- head/sys/arm/arm/gic.c	Tue May 31 17:30:08 2016	(r301059)
+++ head/sys/arm/arm/gic.c	Tue May 31 17:49:47 2016	(r301060)
@@ -968,7 +968,7 @@ gic_bind(struct arm_gic_softc *sc, u_int
 
 	for (mask = 0, cpu = 0; cpu < end; cpu++)
 		if (CPU_ISSET(cpu, cpus))
-			mask |= 1 << cpu;
+			mask |= 1 << arm_gic_map[cpu];
 
 	gic_d_write_1(sc, GICD_ITARGETSR(0) + irq, mask);
 	return (0);