Date: 25 Feb 1998 18:09:02 +0100 From: dag-erli@ifi.uio.no (Dag-Erling Coidan Smørgrav) To: Vincent Poy <vince@venus.GAIANET.NET> Cc: Satoshi Asami <asami@FreeBSD.ORG>, hardware@FreeBSD.ORG Subject: Re: Intel Pentium Chipsets Message-ID: <xzpwwej393l.fsf@gnipahellir.ifi.uio.no> In-Reply-To: Vincent Poy's message of "Wed, 25 Feb 1998 08:14:50 -0800 (PST)" References: <Pine.BSF.3.96.980225081353.254K-100000@venus.GAIANET.NET>
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Vincent Poy <vince@venus.GAIANET.NET> writes: > On Wed, 25 Feb 1998, Satoshi Asami wrote: > > Go to www.intel.com for Intel chipset datasheets. > I did and the link went to the development site. It seems like > the datasheets have changed. The ones a few months ago used to mention > the amount of cacheable ram but the new ones don't. Look harder, and keep in mind that for the Pentium II, it's not the chipset that determines the amount of cacheable memory, but the processor, since the L2 cache is located on the processor card. The datasheet for the 430HX chipset, for instance, has cacheability information in section 4.3 "Secondary Cache Interface", on page 35. It indicates that the HX chipset can support up to 512 MB of cached RAM when equipped with 11-bit tag chips. BTW, the datasheets I read were those listed on <http://developer.intel.com/design/pcisets/datashts/>. -- "I have a closed mind. It helps keeping the rain out." (Michael Press on a.s.r) To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hardware" in the body of the message
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