Skip site navigation (1)Skip section navigation (2)
Date:      Wed, 18 Jul 2007 06:17:55 GMT
From:      Xin LI <delphij@FreeBSD.org>
To:        Perforce Change Reviews <perforce@freebsd.org>
Subject:   PERFORCE change 123674 for review
Message-ID:  <200707180617.l6I6HtJD054046@repoman.freebsd.org>

next in thread | raw e-mail | index | archive | help
http://perforce.freebsd.org/chv.cgi?CH=123674

Change 123674 by delphij@delphij_odin on 2007/07/18 06:17:14

	IFC.

Affected files ...

.. //depot/projects/delphij_fork/ObsoleteFiles.inc#6 integrate
.. //depot/projects/delphij_fork/sys/amd64/amd64/cpu_switch.S#2 integrate
.. //depot/projects/delphij_fork/sys/conf/NOTES#5 integrate
.. //depot/projects/delphij_fork/sys/dev/cxgb/common/cxgb_common.h#2 integrate
.. //depot/projects/delphij_fork/sys/dev/cxgb/common/cxgb_ctl_defs.h#2 integrate
.. //depot/projects/delphij_fork/sys/dev/cxgb/common/cxgb_mc5.c#2 integrate
.. //depot/projects/delphij_fork/sys/dev/cxgb/common/cxgb_t3_cpl.h#2 integrate
.. //depot/projects/delphij_fork/sys/dev/cxgb/common/cxgb_t3_hw.c#2 integrate
.. //depot/projects/delphij_fork/sys/dev/cxgb/common/cxgb_vsc7323.c#2 integrate
.. //depot/projects/delphij_fork/sys/dev/cxgb/common/cxgb_xgmac.c#2 integrate
.. //depot/projects/delphij_fork/sys/dev/cxgb/cxgb_adapter.h#3 integrate
.. //depot/projects/delphij_fork/sys/dev/cxgb/cxgb_ioctl.h#2 integrate
.. //depot/projects/delphij_fork/sys/dev/cxgb/cxgb_main.c#3 integrate
.. //depot/projects/delphij_fork/sys/dev/cxgb/cxgb_offload.c#2 integrate
.. //depot/projects/delphij_fork/sys/dev/cxgb/cxgb_offload.h#2 integrate
.. //depot/projects/delphij_fork/sys/dev/cxgb/cxgb_osdep.h#2 integrate
.. //depot/projects/delphij_fork/sys/dev/cxgb/cxgb_sge.c#3 integrate
.. //depot/projects/delphij_fork/sys/dev/cxgb/sys/mvec.h#2 integrate
.. //depot/projects/delphij_fork/sys/dev/cxgb/t3b_protocol_sram-1.1.0.bin.gz.uu#1 branch
.. //depot/projects/delphij_fork/sys/dev/cxgb/t3b_tp_eeprom-1.1.0.bin.gz.uu#1 branch
.. //depot/projects/delphij_fork/sys/dev/cxgb/t3fw-4.1.0.bin.gz.uu#2 delete
.. //depot/projects/delphij_fork/sys/dev/cxgb/t3fw-4.5.0.bin.gz.uu#1 branch
.. //depot/projects/delphij_fork/sys/dev/usb/if_ural.c#2 integrate
.. //depot/projects/delphij_fork/sys/i386/i386/genassym.c#2 integrate
.. //depot/projects/delphij_fork/sys/i386/i386/swtch.s#2 integrate
.. //depot/projects/delphij_fork/sys/kern/sched_ule.c#2 integrate
.. //depot/projects/delphij_fork/sys/modules/cxgb/Makefile#2 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp.h#3 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_asconf.c#3 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_cc_functions.c#2 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_constants.h#3 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_indata.c#3 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_input.c#3 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_os_bsd.h#2 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_output.c#3 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_pcb.c#3 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_pcb.h#3 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_peeloff.c#2 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_structs.h#3 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_timer.c#3 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_usrreq.c#3 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_var.h#3 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctputil.c#3 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctputil.h#2 integrate
.. //depot/projects/delphij_fork/sys/netinet6/sctp6_usrreq.c#4 integrate
.. //depot/projects/delphij_fork/usr.sbin/wpa/wpa_passphrase/wpa_passphrase.8#2 integrate

Differences ...

==== //depot/projects/delphij_fork/ObsoleteFiles.inc#6 (text+ko) ====

@@ -1,5 +1,5 @@
 #
-# $FreeBSD: src/ObsoleteFiles.inc,v 1.106 2007/07/15 22:47:33 rwatson Exp $
+# $FreeBSD: src/ObsoleteFiles.inc,v 1.107 2007/07/17 17:28:59 delphij Exp $
 #
 # This file lists old files (OLD_FILES), libraries (OLD_LIBS) and
 # directories (OLD_DIRS) which should get removed at an update. Recently

==== //depot/projects/delphij_fork/sys/amd64/amd64/cpu_switch.S#2 (text+ko) ====

@@ -30,13 +30,14 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- * $FreeBSD: src/sys/amd64/amd64/cpu_switch.S,v 1.158 2007/06/06 07:35:07 davidxu Exp $
+ * $FreeBSD: src/sys/amd64/amd64/cpu_switch.S,v 1.159 2007/07/17 22:36:56 jeff Exp $
  */
 
 #include <machine/asmacros.h>
 #include <machine/specialreg.h>
 
 #include "assym.s"
+#include "opt_sched.h"
 
 /*****************************************************************************/
 /* Scheduling                                                                */
@@ -50,6 +51,12 @@
 #define LK
 #endif
 
+#if defined(SCHED_ULE) && defined(SMP)
+#define	SETLK	xchgq
+#else
+#define	SETLK	movq
+#endif
+
 /*
  * cpu_throw()
  *
@@ -148,13 +155,7 @@
 	movq	%cr3,%rax
 	cmpq	%rcx,%rax			/* Same address space? */
 	jne	swinact
-	movq	%rdx, TD_LOCK(%rdi)		/* Release the old thread */
-	/* Wait for the new thread to become unblocked */
-	movq	$blocked_lock, %rdx
-1:
-	movq	TD_LOCK(%rsi),%rcx
-	cmpq	%rcx, %rdx
-	je	1b
+	SETLK	%rdx, TD_LOCK(%rdi)		/* Release the old thread */
 	jmp	sw1
 swinact:
 	movq	%rcx,%cr3			/* new address space */
@@ -163,21 +164,24 @@
 	movq	TD_PROC(%rdi), %rcx		/* oldproc */
 	movq	P_VMSPACE(%rcx), %rcx
 	LK btrl	%eax, VM_PMAP+PM_ACTIVE(%rcx)	/* clear old */
-	movq	%rdx, TD_LOCK(%rdi)		/* Release the old thread */
+	SETLK	%rdx, TD_LOCK(%rdi)		/* Release the old thread */
 swact:
+	/* Set bit in new pmap->pm_active */
+	movq	TD_PROC(%rsi),%rdx		/* newproc */
+	movq	P_VMSPACE(%rdx), %rdx
+	LK btsl	%eax, VM_PMAP+PM_ACTIVE(%rdx)	/* set new */
+
+sw1:
+#if defined(SCHED_ULE) && defined(SMP)
 	/* Wait for the new thread to become unblocked */
 	movq	$blocked_lock, %rdx
 1:
 	movq	TD_LOCK(%rsi),%rcx
 	cmpq	%rcx, %rdx
+	pause
 	je	1b
-
-	/* Set bit in new pmap->pm_active */
-	movq	TD_PROC(%rsi),%rdx		/* newproc */
-	movq	P_VMSPACE(%rdx), %rdx
-	LK btsl	%eax, VM_PMAP+PM_ACTIVE(%rdx)	/* set new */
-
-sw1:
+	lfence
+#endif
 	/*
 	 * At this point, we've switched address spaces and are ready
 	 * to load up the rest of the next context.

==== //depot/projects/delphij_fork/sys/conf/NOTES#5 (text+ko) ====

@@ -1,4 +1,4 @@
-# $FreeBSD: src/sys/conf/NOTES,v 1.1444 2007/07/14 21:49:23 rwatson Exp $
+# $FreeBSD: src/sys/conf/NOTES,v 1.1445 2007/07/18 02:51:21 jeff Exp $
 #
 # NOTES -- Lines that can be cut/pasted into kernel and hints configs.
 #
@@ -176,10 +176,11 @@
 # queue and no CPU affinity which makes it suboptimal for SMP.  It has very
 # good interactivity and priority selection.
 #
-# SCHED_ULE is a new scheduler that has been designed for SMP and has some
-# advantages for UP as well.  It is intended to replace the 4BSD scheduler
-# over time.  NOTE: SCHED_ULE is currently considered experimental and is
-# not recommended for production use at this time.
+# SCHED_ULE provides significant performance advantages over 4BSD on many
+# workloads on SMP machines.  It supports cpu-affinity, per-cpu runqueues
+# and scheduler locks.  It also has a stronger notion of interactivity 
+# which leads to better responsiveness even on uniprocessor machines.  This
+# will eventually become the default scheduler.
 #
 options 	SCHED_4BSD
 #options 	SCHED_ULE

==== //depot/projects/delphij_fork/sys/dev/cxgb/common/cxgb_common.h#2 (text+ko) ====

@@ -25,7 +25,7 @@
 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 POSSIBILITY OF SUCH DAMAGE.
 
-$FreeBSD: src/sys/dev/cxgb/common/cxgb_common.h,v 1.5 2007/06/13 05:36:00 kmacy Exp $
+$FreeBSD: src/sys/dev/cxgb/common/cxgb_common.h,v 1.6 2007/07/17 06:50:34 kmacy Exp $
 
 ***************************************************************************/
 #ifndef __CHELSIO_COMMON_H
@@ -38,8 +38,6 @@
 #endif
 
 enum {
-	MAX_NPORTS = 4,
-	TP_TMR_RES = 200,       /* TP timer resolution in usec */
 	MAX_FRAME_SIZE = 10240, /* max MAC frame size, includes header + FCS */
 	EEPROMSIZE     = 8192,  /* Serial EEPROM size */
 	RSS_TABLE_SIZE = 64,    /* size of RSS lookup and mapping tables */
@@ -48,6 +46,10 @@
 	NCCTRL_WIN     = 32,    /* # of congestion control windows */
 	NTX_SCHED      = 8,     /* # of HW Tx scheduling queues */
 	PROTO_SRAM_LINES = 128, /* size of protocol sram */
+	MAX_NPORTS     = 4,
+	TP_TMR_RES     = 200,
+	TP_SRAM_OFFSET = 4096,	/* TP SRAM content offset in eeprom */
+	TP_SRAM_LEN    = 2112,	/* TP SRAM content offset in eeprom */
 };
 
 #define MAX_RX_COALESCING_LEN 12288U
@@ -72,8 +74,8 @@
 
 enum {
 	TP_VERSION_MAJOR	= 1,
-	TP_VERSION_MINOR	= 0,
-	TP_VERSION_MICRO	= 44
+	TP_VERSION_MINOR	= 1,
+	TP_VERSION_MICRO	= 0
 };
 
 #define S_TP_VERSION_MAJOR		16
@@ -96,7 +98,7 @@
 
 enum {
 	FW_VERSION_MAJOR = 4,
-	FW_VERSION_MINOR = 1,
+	FW_VERSION_MINOR = 5,
 	FW_VERSION_MICRO = 0
 };
 
@@ -393,6 +395,7 @@
 	T3_REV_A  = 0,
 	T3_REV_B  = 2,
 	T3_REV_B2 = 3,
+	T3_REV_C  = 4,
 };
 
 struct trace_params {
@@ -467,6 +470,7 @@
 	unsigned int tx_xcnt;
 	u64 tx_mcnt;
 	unsigned int rx_xcnt;
+	unsigned int rx_ocnt;
 	u64 rx_mcnt;
 	unsigned int toggle_cnt;
 	unsigned int txen;
@@ -562,6 +566,9 @@
 /* Accumulate MAC statistics every 180 seconds.  For 1G we multiply by 10. */
 #define MAC_STATS_ACCUM_SECS 180
 
+/* The external MAC needs accumulation every 30 seconds */
+#define VSC_STATS_ACCUM_SECS 30
+
 #define XGM_REG(reg_addr, idx) \
 	((reg_addr) + (idx) * (XGMAC0_1_BASE_ADDR - XGMAC0_0_BASE_ADDR))
 
@@ -656,9 +663,10 @@
 int t3_seeprom_wp(adapter_t *adapter, int enable);
 int t3_read_flash(adapter_t *adapter, unsigned int addr, unsigned int nwords,
 		  u32 *data, int byte_oriented);
+int t3_get_tp_version(adapter_t *adapter, u32 *vers);
 int t3_check_tpsram_version(adapter_t *adapter);
-int t3_check_tpsram(adapter_t *adapter, u8 *tp_ram, unsigned int size);
-int t3_load_fw(adapter_t *adapter, const u8 *fw_data, unsigned int size);
+int t3_check_tpsram(adapter_t *adapter, const u8 *tp_ram, unsigned int size);
+int t3_load_fw(adapter_t *adapter, const const u8 *fw_data, unsigned int size);
 int t3_get_fw_version(adapter_t *adapter, u32 *vers);
 int t3_check_fw_version(adapter_t *adapter);
 int t3_init_hw(adapter_t *adapter, u32 fw_params);
@@ -668,10 +676,11 @@
 void t3_led_ready(adapter_t *adapter);
 void t3_fatal_err(adapter_t *adapter);
 void t3_set_vlan_accel(adapter_t *adapter, unsigned int ports, int on);
+void t3_enable_filters(adapter_t *adap);
 void t3_config_rss(adapter_t *adapter, unsigned int rss_config, const u8 *cpus,
 		   const u16 *rspq);
 int t3_read_rss(adapter_t *adapter, u8 *lkup, u16 *map);
-int t3_set_proto_sram(adapter_t *adap, u8 *data);
+int t3_set_proto_sram(adapter_t *adap, const u8 *data);
 int t3_mps_set_active_ports(adapter_t *adap, unsigned int port_mask);
 void t3_port_failover(adapter_t *adapter, int port);
 void t3_failover_done(adapter_t *adapter, int port);
@@ -753,8 +762,8 @@
 int t3_elmr_blk_read(adapter_t *adap, int start, u32 *vals, int n);
 int t3_vsc7323_init(adapter_t *adap, int nports);
 int t3_vsc7323_set_speed_fc(adapter_t *adap, int speed, int fc, int port);
+int t3_vsc7323_set_mtu(adapter_t *adap, unsigned int mtu, int port);
 int t3_vsc7323_set_addr(adapter_t *adap, u8 addr[6], int port);
-int t3_vsc7323_set_mtu(adapter_t *adap, unsigned int mtu, int port);
 int t3_vsc7323_enable(adapter_t *adap, int port, int which);
 int t3_vsc7323_disable(adapter_t *adap, int port, int which);
 const struct mac_stats *t3_vsc7323_update_stats(struct cmac *mac);

==== //depot/projects/delphij_fork/sys/dev/cxgb/common/cxgb_ctl_defs.h#2 (text+ko) ====

@@ -1,18 +1,17 @@
 /*
- * Copyright (C) 2003-2007 Chelsio Communications.  All rights reserved.
+ * Copyright (C) 2003-2006 Chelsio Communications.  All rights reserved.
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  * FITNESS FOR A PARTICULAR PURPOSE.  See the LICENSE file included in this
  * release for licensing terms and conditions.
  *
- * $FreeBSD: src/sys/dev/cxgb/common/cxgb_ctl_defs.h,v 1.1 2007/05/25 18:29:17 kmacy Exp $
+ * $FreeBSD: src/sys/dev/cxgb/common/cxgb_ctl_defs.h,v 1.2 2007/07/17 06:50:34 kmacy Exp $
  */
 
 #ifndef _CXGB3_OFFLOAD_CTL_DEFS_H
 #define _CXGB3_OFFLOAD_CTL_DEFS_H
 
-
 enum {
 	GET_MAX_OUTSTANDING_WR,
 	GET_TX_MAX_CHUNK,
@@ -25,9 +24,6 @@
 	GET_IFF_FROM_MAC,
 	GET_DDP_PARAMS,
 	GET_PORTS,
-	FAILOVER,
-	FAILOVER_DONE,
-	FAILOVER_CLEAR,
 
 	ULP_ISCSI_GET_PARAMS,
 	ULP_ISCSI_SET_PARAMS,
@@ -38,6 +34,14 @@
 	RDMA_CQ_DISABLE,
 	RDMA_CTRL_QP_SETUP,
 	RDMA_GET_MEM,
+
+	FAILOVER,
+	FAILOVER_DONE,
+	FAILOVER_CLEAR,
+
+	GET_CPUIDX_OF_QSET,
+
+	GET_RX_PAGE_INFO,
 };
 
 /*
@@ -81,7 +85,7 @@
 
 struct adap_ports {
 	unsigned int nports;     /* number of ports on this adapter */
-	struct ifnet *lldevs[4];
+	struct net_device *lldevs[2];
 };
 
 /*
@@ -102,6 +106,14 @@
 };
 
 /*
+ * Offload TX/RX page information.
+ */
+struct ofld_page_info {
+	unsigned int page_size;  /* Page size, should be a power of 2 */
+	unsigned int num;        /* Number of pages */
+};
+
+/*
  * Structure used to return information to the RDMA layer.
  */
 struct rdma_info {

==== //depot/projects/delphij_fork/sys/dev/cxgb/common/cxgb_mc5.c#2 (text+ko) ====

@@ -28,7 +28,7 @@
 ***************************************************************************/
 
 #include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/cxgb/common/cxgb_mc5.c,v 1.4 2007/06/13 05:36:00 kmacy Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/cxgb/common/cxgb_mc5.c,v 1.5 2007/07/17 06:50:34 kmacy Exp $");
 
 #ifdef CONFIG_DEFINED
 #include <common/cxgb_common.h>
@@ -165,16 +165,26 @@
 			return -1;
 
 	/* Initialize the mask array. */
-	dbgi_wr_data3(adap, 0xffffffff, 0xffffffff, 0xff);
-	for (i = 0; i < size72; i++) {
-		if (i == server_base)   /* entering server or routing region */
-			t3_write_reg(adap, A_MC5_DB_DBGI_REQ_DATA0,
-				     mc5->mode == MC5_MODE_144_BIT ?
-				     0xfffffff9 : 0xfffffffd);
+	for (i = 0; i < server_base; i++) {
+		dbgi_wr_data3(adap, 0x3fffffff, 0xfff80000, 0xff);
+		if (mc5_write(adap, mask_array_base + (i << addr_shift),
+			      write_cmd))
+			return -1;
+		i++;
+		dbgi_wr_data3(adap, 0xffffffff, 0xffffffff, 0xff);
 		if (mc5_write(adap, mask_array_base + (i << addr_shift),
 			      write_cmd))
 			return -1;
 	}
+
+	dbgi_wr_data3(adap,
+		      mc5->mode == MC5_MODE_144_BIT ? 0xfffffff9 : 0xfffffffd,
+		      0xffffffff, 0xff);
+	for (; i < size72; i++)
+		if (mc5_write(adap, mask_array_base + (i << addr_shift),
+			      write_cmd))
+			return -1;
+
 	return 0;
 }
 
@@ -305,17 +315,15 @@
 /* Put MC5 in DBGI mode. */
 static inline void mc5_dbgi_mode_enable(const struct mc5 *mc5)
 {
-	t3_write_reg(mc5->adapter, A_MC5_DB_CONFIG,
-		     V_TMMODE(mc5->mode == MC5_MODE_72_BIT) | F_DBGIEN);
+	t3_set_reg_field(mc5->adapter, A_MC5_DB_CONFIG, F_PRTYEN | F_MBUSEN,
+			 F_DBGIEN);
 }
 
 /* Put MC5 in M-Bus mode. */
 static void mc5_dbgi_mode_disable(const struct mc5 *mc5)
 {
-	t3_write_reg(mc5->adapter, A_MC5_DB_CONFIG,
-		     V_TMMODE(mc5->mode == MC5_MODE_72_BIT) |
-		     V_COMPEN(mc5->mode == MC5_MODE_72_BIT) |
-		     V_PRTYEN(mc5->parity_enabled) | F_MBUSEN);
+	t3_set_reg_field(mc5->adapter, A_MC5_DB_CONFIG, F_DBGIEN,
+			 V_PRTYEN(mc5->parity_enabled) | F_MBUSEN);
 }
 
 /*
@@ -325,9 +333,9 @@
 int t3_mc5_init(struct mc5 *mc5, unsigned int nservers, unsigned int nfilters,
 		unsigned int nroutes)
 {
-	u32 cfg;
 	int err;
 	unsigned int tcam_size = mc5->tcam_size;
+	unsigned int mode72 = mc5->mode == MC5_MODE_72_BIT;
 	adapter_t *adap = mc5->adapter;
 
 	if (!tcam_size)
@@ -336,10 +344,12 @@
 	if (nroutes > MAX_ROUTES || nroutes + nservers + nfilters > tcam_size)
 		return -EINVAL;
 
+	if (nfilters && adap->params.rev < T3_REV_C)
+		mc5->parity_enabled = 0;
+
 	/* Reset the TCAM */
-	cfg = t3_read_reg(adap, A_MC5_DB_CONFIG) & ~F_TMMODE;
-	cfg |= V_TMMODE(mc5->mode == MC5_MODE_72_BIT) | F_TMRST;
-	t3_write_reg(adap, A_MC5_DB_CONFIG, cfg);
+	t3_set_reg_field(adap, A_MC5_DB_CONFIG, F_TMMODE | F_COMPEN,
+			 V_COMPEN(mode72) | V_TMMODE(mode72) | F_TMRST);
 	if (t3_wait_op_done(adap, A_MC5_DB_CONFIG, F_TMRDY, 1, 500, 0)) {
 		CH_ERR(adap, "TCAM reset timed out\n");
 		return -1;
@@ -351,8 +361,6 @@
 	t3_write_reg(adap, A_MC5_DB_SERVER_INDEX,
 		     tcam_size - nroutes - nfilters - nservers);
 
-	mc5->parity_enabled = 1;
-
 	/* All the TCAM addresses we access have only the low 32 bits non 0 */
 	t3_write_reg(adap, A_MC5_DB_DBGI_REQ_ADDR1, 0);
 	t3_write_reg(adap, A_MC5_DB_DBGI_REQ_ADDR2, 0);
@@ -467,6 +475,7 @@
 	u32 cfg = t3_read_reg(adapter, A_MC5_DB_CONFIG);
 
 	mc5->adapter = adapter;
+	mc5->parity_enabled = 1;
 	mc5->mode = (unsigned char) mode;
 	mc5->part_type = (unsigned char) G_TMTYPE(cfg);
 	if (cfg & F_TMTYPEHI)

==== //depot/projects/delphij_fork/sys/dev/cxgb/common/cxgb_t3_cpl.h#2 (text+ko) ====

@@ -25,16 +25,12 @@
 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 POSSIBILITY OF SUCH DAMAGE.
 
-$FreeBSD: src/sys/dev/cxgb/common/cxgb_t3_cpl.h,v 1.3 2007/05/28 22:57:26 kmacy Exp $
+$FreeBSD: src/sys/dev/cxgb/common/cxgb_t3_cpl.h,v 1.4 2007/07/17 06:50:34 kmacy Exp $
 
 ***************************************************************************/
 #ifndef T3_CPL_H
 #define T3_CPL_H
 
-#if !defined(__LITTLE_ENDIAN_BITFIELD) && !defined(__BIG_ENDIAN_BITFIELD)
-# include <asm/byteorder.h>
-#endif
-
 enum CPL_opcode {
 	CPL_PASS_OPEN_REQ     = 0x1,
 	CPL_PASS_ACCEPT_RPL   = 0x2,
@@ -133,6 +129,7 @@
 enum {
 	CPL_CONN_POLICY_AUTO = 0,
 	CPL_CONN_POLICY_ASK  = 1,
+	CPL_CONN_POLICY_FILTER = 2,
 	CPL_CONN_POLICY_DENY = 3
 };
 
@@ -259,16 +256,16 @@
 /* Applicable to BYPASS WRs only: the uP will added a CPL_BARRIER before
  * and after the BYPASS WR if the ATOMIC bit is set.
  */
-#define S_WR_ATOMIC      16
-#define V_WR_ATOMIC(x)   ((x) << S_WR_ATOMIC)
-#define F_WR_ATOMIC      V_WR_ATOMIC(1U)
+#define S_WR_ATOMIC	16
+#define V_WR_ATOMIC(x)	((x) << S_WR_ATOMIC)
+#define F_WR_ATOMIC	V_WR_ATOMIC(1U)
 
 /* Applicable to BYPASS WRs only: the uP will flush buffered non abort
  * related WRs.
  */
-#define S_WR_FLUSH       17
-#define V_WR_FLUSH(x)    ((x) << S_WR_FLUSH)
-#define F_WR_FLUSH       V_WR_FLUSH(1U)
+#define S_WR_FLUSH	17
+#define V_WR_FLUSH(x)	((x) << S_WR_FLUSH)
+#define F_WR_FLUSH	V_WR_FLUSH(1U)
 
 #define S_WR_DATATYPE    20
 #define V_WR_DATATYPE(x) ((x) << S_WR_DATATYPE)
@@ -415,6 +412,11 @@
 #define V_CPU_IDX(x) ((x) << S_CPU_IDX)
 #define G_CPU_IDX(x) (((x) >> S_CPU_IDX) & M_CPU_IDX)
 
+#define S_OPT1_VLAN    6
+#define M_OPT1_VLAN    0xFFF
+#define V_OPT1_VLAN(x) ((x) << S_OPT1_VLAN)
+#define G_OPT1_VLAN(x) (((x) >> S_OPT1_VLAN) & M_OPT1_VLAN)
+
 #define S_MAC_MATCH_VALID    18
 #define V_MAC_MATCH_VALID(x) ((x) << S_MAC_MATCH_VALID)
 #define F_MAC_MATCH_VALID    V_MAC_MATCH_VALID(1U)
@@ -808,6 +810,12 @@
 	__be32 param;
 };
 
+/* tx_data_wr.flags fields */
+#define S_TX_ACK_PAGES		21
+#define M_TX_ACK_PAGES		0x7
+#define V_TX_ACK_PAGES(x) 	((x) << S_TX_ACK_PAGES)
+#define G_TX_ACK_PAGES(x) 	(((x) >> S_TX_ACK_PAGES) & M_TX_ACK_PAGES)
+
 /* tx_data_wr.param fields */
 #define S_TX_PORT    0
 #define M_TX_PORT    0x7
@@ -1009,7 +1017,7 @@
 	union {
 		__be32 nxt_seq;
 		__be32 ddp_report;
-	} __U;
+	} u;
 	__be32 ulp_crc;
 	__be32 ddpvld_status;
 };
@@ -1515,7 +1523,7 @@
 	__be32 len;
 };
 
-    /* ulp_mem_io.cmd_lock_addr fields */
+/* ulp_mem_io.cmd_lock_addr fields */
 #define S_ULP_MEMIO_ADDR    0
 #define M_ULP_MEMIO_ADDR    0x7FFFFFF
 #define V_ULP_MEMIO_ADDR(x) ((x) << S_ULP_MEMIO_ADDR)
@@ -1524,7 +1532,7 @@
 #define V_ULP_MEMIO_LOCK(x) ((x) << S_ULP_MEMIO_LOCK)
 #define F_ULP_MEMIO_LOCK    V_ULP_MEMIO_LOCK(1U)
 
-    /* ulp_mem_io.len fields */
+/* ulp_mem_io.len fields */
 #define S_ULP_MEMIO_DATA_LEN    28
 #define M_ULP_MEMIO_DATA_LEN    0xF
 #define V_ULP_MEMIO_DATA_LEN(x) ((x) << S_ULP_MEMIO_DATA_LEN)
@@ -1534,7 +1542,7 @@
 	__be32 len;
 };
 
-    /* ulp_txpkt.cmd_dest fields */
+/* ulp_txpkt.cmd_dest fields */
 #define S_ULP_TXPKT_DEST    24
 #define M_ULP_TXPKT_DEST    0xF
 #define V_ULP_TXPKT_DEST(x) ((x) << S_ULP_TXPKT_DEST)

==== //depot/projects/delphij_fork/sys/dev/cxgb/common/cxgb_t3_hw.c#2 (text+ko) ====

@@ -28,7 +28,7 @@
 ***************************************************************************/
 
 #include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/cxgb/common/cxgb_t3_hw.c,v 1.5 2007/06/13 05:36:00 kmacy Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/cxgb/common/cxgb_t3_hw.c,v 1.6 2007/07/17 06:50:34 kmacy Exp $");
 
 
 #ifdef CONFIG_DEFINED
@@ -37,8 +37,8 @@
 #include <dev/cxgb/cxgb_include.h>
 #endif
 
-#define DENTER() printf("entered %s\n", __FUNCTION__);
-#define DEXIT() printf("exiting %s\n", __FUNCTION__);
+#undef msleep
+#define msleep t3_os_sleep
 
 
 /**
@@ -355,7 +355,7 @@
 			return err;
 		ctl &= BMCR_RESET;
 		if (ctl)
-			t3_os_sleep(1);
+			msleep(1);
 	} while (ctl && --wait);
 
 	return ctl ? -1 : 0;
@@ -482,7 +482,7 @@
 #define CAPS_10G (SUPPORTED_10000baseT_Full | SUPPORTED_AUI)
 
 static struct port_type_info port_types[] = {
-	{ NULL, 0, NULL },
+	{ NULL },
 	{ t3_ael1002_phy_prep, CAPS_10G | SUPPORTED_FIBRE,
 	  "10GBASE-XR" },
 	{ t3_vsc8211_phy_prep, CAPS_1G | SUPPORTED_TP | SUPPORTED_IRQ,
@@ -594,7 +594,7 @@
 	t3_os_pci_write_config_2(adapter, base + PCI_VPD_ADDR,
 				 (u16)addr | PCI_VPD_ADDR_F);
 	do {
-		t3_os_sleep(1);
+		msleep(1);
 		t3_os_pci_read_config_2(adapter, base + PCI_VPD_ADDR, &val);
 	} while ((val & PCI_VPD_ADDR_F) && --attempts);
 
@@ -770,7 +770,7 @@
 		if (--attempts == 0)
 			return -EAGAIN;
 		if (delay)
-			t3_os_sleep(delay);
+			msleep(delay);
 	}
 }
 
@@ -860,10 +860,32 @@
 }
 
 /**
+ *	t3_get_tp_version - read the tp sram version
+ *	@adapter: the adapter
+ *	@vers: where to place the version
+ *
+ *	Reads the protocol sram version from sram.
+ */
+int t3_get_tp_version(adapter_t *adapter, u32 *vers)
+{
+	int ret;
+
+	/* Get version loaded in SRAM */
+	t3_write_reg(adapter, A_TP_EMBED_OP_FIELD0, 0);
+	ret = t3_wait_op_done(adapter, A_TP_EMBED_OP_FIELD0,
+			      1, 1, 5, 1);
+	if (ret)
+		return ret;
+	
+	*vers = t3_read_reg(adapter, A_TP_EMBED_OP_FIELD1);
+
+	return 0;
+}
+
+/**
  *	t3_check_tpsram_version - read the tp sram version
  *	@adapter: the adapter
  *
- *	Reads the protocol sram version from serial eeprom.
  */
 int t3_check_tpsram_version(adapter_t *adapter)
 {
@@ -886,6 +908,9 @@
 	if (major == TP_VERSION_MAJOR && minor == TP_VERSION_MINOR) 
 		return 0;
 
+	CH_ERR(adapter, "found wrong TP version (%u.%u), "
+	       "driver needs version %d.%d\n", major, minor,
+	       TP_VERSION_MAJOR, TP_VERSION_MINOR);
 	return -EINVAL;
 }
 
@@ -899,7 +924,7 @@
  *	Checks if an adapter's tp sram is compatible with the driver.
  *	Returns 0 if the versions are compatible, a negative error otherwise.
  */
-int t3_check_tpsram(adapter_t *adapter, u8 *tp_sram, unsigned int size)
+int t3_check_tpsram(adapter_t *adapter, const u8 *tp_sram, unsigned int size)
 {
 	u32 csum;
 	unsigned int i;
@@ -960,8 +985,8 @@
 		return 0;
 
 	CH_ERR(adapter, "found wrong FW version (%u.%u), "
-	       "driver needs version %d.%d\n", major, minor,
-	       FW_VERSION_MAJOR, FW_VERSION_MINOR);
+	    "driver needs version %d.%d\n", major, minor,
+	    FW_VERSION_MAJOR, FW_VERSION_MINOR);
 	return -EINVAL;
 }
 
@@ -2329,7 +2354,29 @@
 				 V_NICMODE(!enable));
 }
 
+static void tp_wr_bits_indirect(adapter_t *adap, unsigned int addr,
+				unsigned int mask, unsigned int val)
+{
+	t3_write_reg(adap, A_TP_PIO_ADDR, addr);
+	val |= t3_read_reg(adap, A_TP_PIO_DATA) & ~mask;
+	t3_write_reg(adap, A_TP_PIO_DATA, val);
+}
+
 /**
+ *	t3_enable_filters - enable the HW filters
+ *	@adap: the adapter
+ *
+ *	Enables the HW filters for NIC traffic.
+ */
+void t3_enable_filters(adapter_t *adap)
+{
+	t3_set_reg_field(adap, A_TP_IN_CONFIG, F_NICMODE, 0);
+	t3_set_reg_field(adap, A_MC5_DB_CONFIG, 0, F_FILTEREN);
+	t3_set_reg_field(adap, A_TP_GLOBAL_CONFIG, 0, V_FIVETUPLELOOKUP(3));
+	tp_wr_bits_indirect(adap, A_TP_INGRESS_CONFIG, 0, F_LOOKUPEVERYPKT);
+}
+
+/**
  *	pm_num_pages - calculate the number of pages of the payload memory
  *	@mem_size: the size of the payload memory
  *	@pg_size: the size of each payload memory page
@@ -2422,14 +2469,6 @@
 	t3_write_reg(adap, A_TP_PIO_DATA, val);
 }
 
-static void tp_wr_bits_indirect(adapter_t *adap, unsigned int addr,
-				unsigned int mask, unsigned int val)
-{
-	t3_write_reg(adap, A_TP_PIO_ADDR, addr);
-	val |= t3_read_reg(adap, A_TP_PIO_DATA) & ~mask;
-	t3_write_reg(adap, A_TP_PIO_DATA, val);
-}
-
 static void tp_config(adapter_t *adap, const struct tp_params *p)
 {
 	t3_write_reg(adap, A_TP_GLOBAL_CONFIG, F_TXPACINGENABLE | F_PATHMTU |
@@ -2459,10 +2498,12 @@
 
 	if (adap->params.rev > 0) {
 		tp_wr_indirect(adap, A_TP_EGRESS_CONFIG, F_REWRITEFORCETOSIZE);
-		t3_set_reg_field(adap, A_TP_PARA_REG3, F_TXPACEAUTO,
-				 F_TXPACEAUTO);
+		t3_set_reg_field(adap, A_TP_PARA_REG3, 0,
+				 F_TXPACEAUTO | F_TXPACEAUTOSTRICT);
 		t3_set_reg_field(adap, A_TP_PC_CONFIG, F_LOCKTID, F_LOCKTID);
-		t3_set_reg_field(adap, A_TP_PARA_REG3, 0, F_TXPACEAUTOSTRICT);
+		tp_wr_indirect(adap, A_TP_VLAN_PRI_MAP, 0xfa50);
+		tp_wr_indirect(adap, A_TP_MAC_MATCH_MAP0, 0xfac688);
+		tp_wr_indirect(adap, A_TP_MAC_MATCH_MAP1, 0xfac688);
 	} else
 		t3_set_reg_field(adap, A_TP_PARA_REG3, 0, F_TXPACEFIXED);
 
@@ -2816,17 +2857,17 @@
  *
  *	Write the contents of the protocol SRAM.
  */
-int t3_set_proto_sram(adapter_t *adap, u8 *data)
+int t3_set_proto_sram(adapter_t *adap, const u8 *data)
 {
 	int i;
-	u32 *buf = (u32 *)data;
+	u32 *buf = (u32 *)(uintptr_t)data;
 
 	for (i = 0; i < PROTO_SRAM_LINES; i++) {
-		t3_write_reg(adap, A_TP_EMBED_OP_FIELD5, htobe32(*buf++));
-		t3_write_reg(adap, A_TP_EMBED_OP_FIELD4, htobe32(*buf++));
-		t3_write_reg(adap, A_TP_EMBED_OP_FIELD3, htobe32(*buf++));
-		t3_write_reg(adap, A_TP_EMBED_OP_FIELD2, htobe32(*buf++));
-		t3_write_reg(adap, A_TP_EMBED_OP_FIELD1, htobe32(*buf++));
+		t3_write_reg(adap, A_TP_EMBED_OP_FIELD5, cpu_to_be32(*buf++));
+		t3_write_reg(adap, A_TP_EMBED_OP_FIELD4, cpu_to_be32(*buf++));
+		t3_write_reg(adap, A_TP_EMBED_OP_FIELD3, cpu_to_be32(*buf++));
+		t3_write_reg(adap, A_TP_EMBED_OP_FIELD2, cpu_to_be32(*buf++));
+		t3_write_reg(adap, A_TP_EMBED_OP_FIELD1, cpu_to_be32(*buf++));
 		
 		t3_write_reg(adap, A_TP_EMBED_OP_FIELD0, i << 1 | 1 << 31);
 		if (t3_wait_op_done(adap, A_TP_EMBED_OP_FIELD0, 1, 1, 5, 1))
@@ -3053,7 +3094,7 @@
 		for (i = 0; i < 5; ++i) {
 			t3_write_reg(adapter, A_XGM_XAUI_IMP, 0);
 			(void) t3_read_reg(adapter, A_XGM_XAUI_IMP);
-			t3_os_sleep(1);
+			msleep(1);
 			v = t3_read_reg(adapter, A_XGM_XAUI_IMP);
 			if (!(v & (F_XGM_CALFAULT | F_CALBUSY))) {
 				t3_write_reg(adapter, A_XGM_XAUI_IMP,
@@ -3140,12 +3181,12 @@
 
 	t3_write_reg(adapter, mc7->offset + A_MC7_CFG, val | F_IFEN);
 	val = t3_read_reg(adapter, mc7->offset + A_MC7_CFG);  /* flush */
-	t3_os_sleep(1);
+	msleep(1);
 
 	if (!slow) {
 		t3_write_reg(adapter, mc7->offset + A_MC7_CAL, F_SGL_CAL_EN);
 		(void) t3_read_reg(adapter, mc7->offset + A_MC7_CAL);
-		t3_os_sleep(1);
+		msleep(1);
 		if (t3_read_reg(adapter, mc7->offset + A_MC7_CAL) &
 		    (F_BUSY | F_SGL_CAL_EN | F_CAL_FAULT)) {
 			CH_ERR(adapter, "%s MC7 calibration timed out\n",
@@ -3211,7 +3252,7 @@
 
 	attempts = 50;
 	do {
-		t3_os_sleep(250);
+		msleep(250);
 		val = t3_read_reg(adapter, mc7->offset + A_MC7_BIST_OP);
 	} while ((val & F_BUSY) && --attempts);
 	if (val & F_BUSY) {
@@ -3297,11 +3338,8 @@
 	else if (calibrate_xgm(adapter))
 		goto out_err;
 
-	if (adapter->params.nports > 2) {
+	if (adapter->params.nports > 2)
 		t3_mac_reset(&adap2pinfo(adapter, 0)->mac);
-		if ((err = t3_vsc7323_init(adapter, adapter->params.nports)))
-		       goto out_err;
-	}
 
 	if (vpd->mclk) {
 		partition_mem(adapter, &adapter->params.tp);
@@ -3341,7 +3379,7 @@
 	(void) t3_read_reg(adapter, A_CIM_BOOT_CFG);    /* flush */
 
 	do {                          /* wait for uP to initialize */
-		t3_os_sleep(20);
+		msleep(20);
 	} while (t3_read_reg(adapter, A_CIM_HOST_ACC_DATA) && --attempts);
 	if (!attempts) {
 		CH_ERR(adapter, "uP initialization timed out\n");
@@ -3453,7 +3491,6 @@
 {
 	mac->adapter = adapter;
 	mac->multiport = adapter->params.nports > 2;
-
 	if (mac->multiport) {
 		mac->ext_port = (unsigned char)index;
 		mac->nucast = 8;
@@ -3516,7 +3553,7 @@
 	 * XXX The delay time should be modified.
 	 */
 	for (i = 0; i < 10; i++) {
-		t3_os_sleep(50);
+		msleep(50);
 		t3_os_pci_read_config_2(adapter, 0x00, &devid);
 		if (devid == 0x1425)
 			break;
@@ -3548,16 +3585,18 @@
 	adapter->params.chan_map = !!ai->nports0 | (!!ai->nports1 << 1);
 	adapter->params.rev = t3_read_reg(adapter, A_PL_REV);
 	adapter->params.linkpoll_period = 0;
-	adapter->params.stats_update_period = is_10G(adapter) ?
-		MAC_STATS_ACCUM_SECS : (MAC_STATS_ACCUM_SECS * 10);
+	if (adapter->params.nports > 2)
+		adapter->params.stats_update_period = VSC_STATS_ACCUM_SECS;
+	else
+		adapter->params.stats_update_period = is_10G(adapter) ?
+			MAC_STATS_ACCUM_SECS : (MAC_STATS_ACCUM_SECS * 10);
 	adapter->params.pci.vpd_cap_addr =
 		t3_os_find_pci_capability(adapter, PCI_CAP_ID_VPD);
 
 	ret = get_vpd_params(adapter, &adapter->params.vpd);
-	if (ret < 0) {
-		printf("failed to get VPD params\n");
+	if (ret < 0)
 		return ret;
-	}
+
 	if (reset && t3_reset_adapter(adapter))
 		return -1;
 
@@ -3606,24 +3645,18 @@
 
 	early_hw_init(adapter, ai);
 
+	if (adapter->params.nports > 2 &&
+	    (ret = t3_vsc7323_init(adapter, adapter->params.nports)))
+		return ret;
+
 	for_each_port(adapter, i) {
 		u8 hw_addr[6];
 		struct port_info *p = adap2pinfo(adapter, i);
 
-		while (adapter->params.vpd.port_type[j] == 0) {
+		while (!adapter->params.vpd.port_type[j])
 			++j;
-		}
-		if (adapter->params.vpd.port_type[j] > sizeof(port_types)/sizeof(port_types[0])) {
-			printf("bad port type idx=%d\n", adapter->params.vpd.port_type[j]);
-			printf("port types: ");
-			for (i = 0; i < j; i++)
-				printf("port[%d]=%d  ", i, adapter->params.vpd.port_type[i]);
-			printf("\n");
-			return -1;
-		}
-		
 
-	        p->port_type = &port_types[adapter->params.vpd.port_type[j]];
+		p->port_type = &port_types[adapter->params.vpd.port_type[j]];
 		p->port_type->phy_prep(&p->phy, adapter, ai->phy_base_addr + j,
 				       ai->mdio_ops);
 		mac_prep(&p->mac, adapter, j);

==== //depot/projects/delphij_fork/sys/dev/cxgb/common/cxgb_vsc7323.c#2 (text+ko) ====

@@ -29,7 +29,7 @@
 ***************************************************************************/
 
 #include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/cxgb/common/cxgb_vsc7323.c,v 1.1 2007/06/13 05:36:00 kmacy Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/cxgb/common/cxgb_vsc7323.c,v 1.2 2007/07/17 06:50:34 kmacy Exp $");
 
 #ifdef CONFIG_DEFINED
 #include <common/cxgb_common.h>
@@ -115,13 +115,16 @@
 		{ VSC_REG(2, 0, 0x2f), 0 },
 		{ VSC_REG(2, 0, 0xf),  0xa0010291 },
 		{ VSC_REG(2, 1, 0x2f), 1 },
-		{ VSC_REG(2, 1, 0xf),  0xa0026301 }
+		{ VSC_REG(2, 1, 0xf),  0xa026301 }
 	};
 	static struct addr_val_pair xg_avp[] = {
 		{ VSC_REG(1, 10, 0),    0x600b },
-		{ VSC_REG(1, 10, 2),    0x4000 },
+		{ VSC_REG(1, 10, 1),    0x70600 }, //QUANTA = 96*1024*8/512
+		{ VSC_REG(1, 10, 2),    0x2710 },
 		{ VSC_REG(1, 10, 5),    0x65 },
-		{ VSC_REG(1, 10, 7),    3 },
+		{ VSC_REG(1, 10, 7),    0x23 },
+		{ VSC_REG(1, 10, 0x23), 0x800007bf },
+		{ VSC_REG(1, 10, 0x23), 0x000007bf },
 		{ VSC_REG(1, 10, 0x23), 0x800007bf },
 		{ VSC_REG(1, 10, 0x24), 4 }
 	};
@@ -130,10 +133,9 @@
 
 	for (i = 0; i < ARRAY_SIZE(sys_avp); i++)
 		if ((ret = t3_elmr_blk_write(adap, sys_avp[i].reg_addr,
-			    &sys_avp[i].val, 1)))
+					     &sys_avp[i].val, 1)))
 			return ret;
 
-	
 	ing_step = 0xc0 / nports;
 	egr_step = 0x40 / nports;
 	ing_bot = egr_bot = 0;
@@ -141,22 +143,27 @@
 //	egr_wm = egr_step * 64;
 
 	/* {ING,EGR}_CONTROL.CLR = 1 here */
-	for (i = 0; i < nports; i++)
-		if ((ret = elmr_write(adap, VSC_REG(2, 0, 0x10 + i),
+	for (i = 0; i < nports; i++) {
+		if (
+		    (ret = elmr_write(adap, VSC_REG(2, 0, 0x10 + i),
 				((ing_bot + ing_step) << 16) | ing_bot)) ||
-		    (ret = elmr_write(adap, VSC_REG(2, 0, 0x50 + i), 0)) ||
+		    (ret = elmr_write(adap, VSC_REG(2, 0, 0x40 + i),
+				0x6000a00)) ||
+		    (ret = elmr_write(adap, VSC_REG(2, 0, 0x50 + i), 1)) ||
 		    (ret = elmr_write(adap, VSC_REG(2, 1, 0x10 + i),
 				((egr_bot + egr_step) << 16) | egr_bot)) ||
 		    (ret = elmr_write(adap, VSC_REG(2, 1, 0x40 + i),
 				0x2000280)) ||
 		    (ret = elmr_write(adap, VSC_REG(2, 1, 0x50 + i), 0)))
 			return ret;
-
+		ing_bot += ing_step;
+		egr_bot += egr_step;
+	}
 
 	for (i = 0; i < ARRAY_SIZE(fifo_avp); i++)
 		if ((ret = t3_elmr_blk_write(adap, fifo_avp[i].reg_addr,
-			    &fifo_avp[i].val, 1)))
-                        return ret;
+					     &fifo_avp[i].val, 1)))
+			return ret;
 
 	for (i = 0; i < ARRAY_SIZE(xg_avp); i++)
 		if ((ret = t3_elmr_blk_write(adap, xg_avp[i].reg_addr,
@@ -198,7 +205,7 @@
 			return r;
 	}
 
-	r = (fc & PAUSE_RX) ? 0x6ffff : 0x2ffff;
+	r = (fc & PAUSE_RX) ? 0x60200 : 0x20200; //QUANTA = 32*1024*8/512

>>> TRUNCATED FOR MAIL (1000 lines) <<<



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?200707180617.l6I6HtJD054046>