Date: Fri, 19 Sep 1997 08:49:37 +0200 From: j@uriah.heep.sax.de (J Wunsch) To: hackers@freebsd.org Subject: Re: INB question Message-ID: <19970919084937.PR22228@uriah.heep.sax.de> In-Reply-To: <199709190029.JAA02973@word.smith.net.au>; from Mike Smith on Sep 19, 1997 09:59:39 %2B0930 References: <19970918221839.VL10449@uriah.heep.sax.de> <199709190029.JAA02973@word.smith.net.au>
next in thread | previous in thread | raw e-mail | index | archive | help
As Mike Smith wrote: > > That's why i wrote ``unspecified, with a tendency to 0xff''. > > The implication (as an english speaker) from your claim was > "unspecified but sometimes 0xff". It would be civilised to qualify the > "tendency" under the circumstances. I wasn't that sure about the exact hardware details as you are. That made my expression more vague. > OBTW, see my trailing comment wrt. transfer rates; if ISA read cycles > are deferred by 1.25us, how do I manage 1.3MW/sec from a user-space > process? (This is with a P166 on an HX board; nothing special.) With a true plain ISA card? The boot code still uses an inb(0x84) for a timing loop, and it seems to get the timing well enough with it. OTOH, 800000 transfers per second seem to support your figure. If the transfers are 16 bits wide, this would be ~ 80 % of the theoretical maximum. -- cheers, J"org joerg_wunsch@uriah.heep.sax.de -- http://www.sax.de/~joerg/ -- NIC: JW11-RIPE Never trust an operating system you don't have sources for. ;-)
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?19970919084937.PR22228>