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Date:      Fri, 4 Jun 2004 18:54:54 +0200
From:      Bernd Walter <ticso@cicely12.cicely.de>
To:        Scott Long <scottl@freebsd.org>
Cc:        Andy Farkas <andyf@speednet.com.au>
Subject:   Re: AHC_ALLOW_MEMIO 5.2.1
Message-ID:  <20040604165453.GF51677@cicely12.cicely.de>
In-Reply-To: <40908EB2.4090803@freebsd.org>
References:  <6.1.0.6.2.20040428074703.024548b8@localhost> <20040429135222.L64510@hewey.af.speednet.com.au> <40908EB2.4090803@freebsd.org>

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On Wed, Apr 28, 2004 at 11:12:18PM -0600, Scott Long wrote:
> Andy Farkas wrote:
> 
> >On Wed, 28 Apr 2004, J.D. Bronson wrote:
> >
> >
> >>What happened to this kernel option on 5.2.1?
> >>
> >>AHC_ALLOW_MEMIO
> >>
> >>
> >>It does not seem to be in any file at all anymore?
> >>
> >> -JDB
> >
> >
> >Its in /sys/conf/NOTES :)
> >
> >The generated file opt_aic7xxx.h will contain it.
> >
> >I sometimes enable this option in my kernels. Whether it does anything or
> >not (performance-wise or other), I don't know.
> >
> 
> On x86, MEMIO is generally faster and causes the CPU to spin less than
> IOPORT cycles do.  It can result in a minor but measurable speed
> difference, though the effects of HyperThreading, when in use, could
> offset the benefits.  In any case, the reason that this option exists
> is to work around motherboards that incorrectly do write-combining on
> MEMIO registers, something that most ahc/ahd chips do not support nor
> handle well.  We added a somewhat sophisticated runtime test for this
> to the driver last year, so there really isn't a reason to not enable
> the option.  If you do and the test detects problems, it will
> automatically throttle back to IOPORT.  We should probably just remove
> the option all-together, and just use the sysctl/tunable as a backup in
> case problems develope.

The write combining might be a good explanation why I never had success
with ahc controllers on several different alpha models.
I will check for this.
Alpha CPUs don't know about IO and setup IO space from normal memory
address range on their primary busses, however behind PCI-PCI bridges
only memory space is available.
Non bridged controllers tend to fail after some usage and the memory
range probing fails most of the time.

-- 
B.Walter                   BWCT                http://www.bwct.de
bernd@bwct.de                                  info@bwct.de



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