Date: Fri, 19 Sep 1997 15:19:07 +0000 (GMT) From: Terry Lambert <tlambert@primenet.com> To: joerg_wunsch@uriah.heep.sax.de Cc: hackers@FreeBSD.ORG Subject: Re: INB question Message-ID: <199709191519.IAA07324@usr07.primenet.com> In-Reply-To: <19970919084937.PR22228@uriah.heep.sax.de> from "J Wunsch" at Sep 19, 97 08:49:37 am
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> > OBTW, see my trailing comment wrt. transfer rates; if ISA read cycles > > are deferred by 1.25us, how do I manage 1.3MW/sec from a user-space > > process? (This is with a P166 on an HX board; nothing special.) > > With a true plain ISA card? The boot code still uses an inb(0x84) for > a timing loop, and it seems to get the timing well enough with it. This is actually bogus as hell. First, because it's an input, not an output. Second, port 0x84 is the Compaq POST output port, or it is the EISA "Synchronize Bus Cycle Register" -- reading it only causes an extended I/O ready cycle to occur on EISA systems, and is more useful for flushing EISA bus master or DMA. It's not even support on all EISA systems (ie: HiNT chipsets, which are broken in other ways). I think the "correct" timing mechanism is to output a byte to port 0x80. This is the POST code port, and it's what Linux uses. Terry Lambert terry@lambert.org --- Any opinions in this posting are my own and not those of my present or previous employers.
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