Date: Sun, 15 Dec 2002 16:01:05 -0800 (PST) From: Marcel Moolenaar <marcel@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 22360 for review Message-ID: <200212160001.gBG015fQ032407@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=22360 Change 22360 by marcel@marcel_nfs on 2002/12/15 16:00:07 Rewrite map_pal_code() and map_port_space(). Remove all but one srlz.i and replace some with srlz.d. Add an unessessary srlz.d to keep as(1) happy. Explicit serialization allows (and has been specificly designed for) dependency violation when such is non-fatal. For example: setting PSR.ac can be unserialized with any memory load/store if it is known that the load/store is aligned. Even if the load/store is unaligned, one either gets or doesn't get the fault. Don't map the I/O port space in ITR, map it in DTR. Map the PAL code in both ITR and DTR. While here, remove an assert that we expect I/O port space. If everything is memory mapped, then we don't really need it. Affected files ... .. //depot/projects/ia64/sys/ia64/ia64/machdep.c#57 edit Differences ... ==== //depot/projects/ia64/sys/ia64/ia64/machdep.c#57 (text+ko) ==== @@ -293,16 +293,19 @@ pte.pte_ar = PTE_AR_RWX; pte.pte_ppn = ia64_pal_base >> 12; - __asm __volatile("mov %0=psr;;" : "=r" (psr)); - __asm __volatile("rsm psr.ic|psr.i;; srlz.i;;"); - __asm __volatile("mov cr.ifa=%0" :: + __asm __volatile("mov %0=psr;;" : "=r" (psr)); + __asm __volatile("rsm psr.ic|psr.i;;"); + __asm __volatile("srlz.d"); + __asm __volatile("mov cr.ifa=%0" :: "r"(IA64_PHYS_TO_RR7(ia64_pal_base))); - __asm __volatile("mov cr.itir=%0" :: "r"(28 << 2)); + __asm __volatile("mov cr.itir=%0;;" :: "r"(28 << 2)); + __asm __volatile("itr.d dtr[%0]=%1;;" :: "r"(1), + "r"(*(u_int64_t*)&pte)); + __asm __volatile("srlz.d"); /* XXX not needed. */ + __asm __volatile("itr.i itr[%0]=%1;;" :: "r"(1), + "r"(*(u_int64_t*)&pte)); + __asm __volatile("mov psr.l=%0" :: "r" (psr)); __asm __volatile("srlz.i;;"); - __asm __volatile("itr.i itr[%0]=%1;;" :: - "r"(2), "r"(*(u_int64_t*)&pte)); - __asm __volatile("srlz.i;;"); - __asm __volatile("mov psr.l=%0;; srlz.i;;" :: "r" (psr)); } void @@ -321,20 +324,19 @@ pte.pte_a = 1; pte.pte_d = 1; pte.pte_pl = PTE_PL_KERN; - pte.pte_ar = PTE_AR_RWX; + pte.pte_ar = PTE_AR_RW; pte.pte_ppn = ia64_port_base >> 12; - __asm __volatile("mov %0=psr;;" : "=r" (psr)); - __asm __volatile("rsm psr.ic|psr.i;; srlz.i;;"); - __asm __volatile("mov cr.ifa=%0" :: - "r"(IA64_PHYS_TO_RR6(ia64_port_base))); + __asm __volatile("mov %0=psr;;" : "=r" (psr)); + __asm __volatile("rsm psr.ic|psr.i;;"); + __asm __volatile("srlz.d"); + __asm __volatile("mov cr.ifa=%0" :: "r"(ia64_port_base)); /* XXX We should use the size from the memory descriptor. */ - __asm __volatile("mov cr.itir=%0" :: "r"(24 << 2)); - __asm __volatile("srlz.i;;"); - __asm __volatile("itr.i itr[%0]=%1;;" :: - "r"(1), "r"(*(u_int64_t*)&pte)); - __asm __volatile("srlz.i;;"); - __asm __volatile("mov psr.l=%0;; srlz.i;;" :: "r" (psr)); + __asm __volatile("mov cr.itir=%0;;" :: "r"(24 << 2)); + __asm __volatile("itr.d dtr[%0]=%1;;" :: "r"(2), + "r"(*(u_int64_t*)&pte)); + __asm __volatile("mov psr.l=%0" :: "r" (psr)); + __asm __volatile("srlz.d"); } static void @@ -444,9 +446,6 @@ ia64_pal_base = mdp->PhysicalStart; } - /* Map the memory mapped I/O Port space */ - KASSERT(ia64_port_base != 0, - ("%s: no I/O port memory region", __func__)); map_port_space(); metadata_missing = 0; To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe p4-projects" in the body of the message
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