Date: Wed, 30 Jan 2008 09:49:02 GMT From: "Randall R. Stewart" <rrs@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 134459 for review Message-ID: <200801300949.m0U9n2vA015574@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=134459 Change 134459 by rrs@rrs-mips2-jnpr on 2008/01/30 09:48:44 s9indent of part of the octeon files. Affected files ... .. //depot/projects/mips2-jnpr/src/sys/dev/rgmii/octeon_fau.c#2 edit .. //depot/projects/mips2-jnpr/src/sys/dev/rgmii/octeon_fau.h#2 edit .. //depot/projects/mips2-jnpr/src/sys/dev/rgmii/octeon_fpa.c#2 edit .. //depot/projects/mips2-jnpr/src/sys/dev/rgmii/octeon_fpa.h#2 edit .. //depot/projects/mips2-jnpr/src/sys/dev/rgmii/octeon_ipd.c#2 edit .. //depot/projects/mips2-jnpr/src/sys/dev/rgmii/octeon_ipd.h#2 edit .. //depot/projects/mips2-jnpr/src/sys/dev/rgmii/octeon_pip.h#2 edit .. //depot/projects/mips2-jnpr/src/sys/dev/rgmii/octeon_pko.c#2 edit .. //depot/projects/mips2-jnpr/src/sys/dev/rgmii/octeon_pko.h#2 edit Differences ... ==== //depot/projects/mips2-jnpr/src/sys/dev/rgmii/octeon_fau.c#2 (text+ko) ==== @@ -1,5 +1,5 @@ -/* -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights +/* +Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights reserved. Redistribution and use in source and binary forms, with or without @@ -17,25 +17,25 @@ * Neither the name of Cavium Networks nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written - permission. + permission. -This Software, including technical data, may be subject to U.S. export -control laws, including the U.S. Export Administration Act and its -associated regulations, and may be subject to export or import -regulations in other countries. You warrant that You will comply -strictly in all respects with all such regulations and acknowledge that -you have the responsibility to obtain licenses to export, re-export or -import the Software. +This Software, including technical data, may be subject to U.S. export +control laws, including the U.S. Export Administration Act and its +associated regulations, and may be subject to export or import +regulations in other countries. You warrant that You will comply +strictly in all respects with all such regulations and acknowledge that +you have the responsibility to obtain licenses to export, re-export or +import the Software. -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS -OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT -TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY -REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT -DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF -TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, -LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION -OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR +TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" +AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS +OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT +TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY +REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT +DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF +TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, +LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION +OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. */ @@ -56,7 +56,8 @@ * * How do we initialize FAU unit. I don't even think we can reset it. */ -void octeon_fau_init (void) +void +octeon_fau_init(void) { } @@ -66,7 +67,8 @@ * * Let the Fetch/Add unit roll */ -void octeon_fau_enable (void) +void +octeon_fau_enable(void) { } @@ -78,6 +80,7 @@ * * Don't know if we can even do that. */ -void octeon_fau_disable (void) +void +octeon_fau_disable(void) { } ==== //depot/projects/mips2-jnpr/src/sys/dev/rgmii/octeon_fau.h#2 (text+ko) ==== @@ -1,5 +1,5 @@ /* -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights +Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights reserved. Redistribution and use in source and binary forms, with or without @@ -17,25 +17,25 @@ * Neither the name of Cavium Networks nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written - permission. + permission. -This Software, including technical data, may be subject to U.S. export -control laws, including the U.S. Export Administration Act and its -associated regulations, and may be subject to export or import -regulations in other countries. You warrant that You will comply -strictly in all respects with all such regulations and acknowledge that -you have the responsibility to obtain licenses to export, re-export or -import the Software. +This Software, including technical data, may be subject to U.S. export +control laws, including the U.S. Export Administration Act and its +associated regulations, and may be subject to export or import +regulations in other countries. You warrant that You will comply +strictly in all respects with all such regulations and acknowledge that +you have the responsibility to obtain licenses to export, re-export or +import the Software. -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS -OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT -TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY -REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT -DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF -TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, -LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION -OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR +TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" +AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS +OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT +TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY +REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT +DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF +TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, +LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION +OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. */ @@ -55,10 +55,10 @@ typedef enum { - OCTEON_FAU_OP_SIZE_8 = 0, - OCTEON_FAU_OP_SIZE_16 = 1, - OCTEON_FAU_OP_SIZE_32 = 2, - OCTEON_FAU_OP_SIZE_64 = 3 + OCTEON_FAU_OP_SIZE_8 = 0, + OCTEON_FAU_OP_SIZE_16 = 1, + OCTEON_FAU_OP_SIZE_32 = 2, + OCTEON_FAU_OP_SIZE_64 = 3 } octeon_fau_op_size_t; @@ -73,20 +73,18 @@ #define OCTEON_FAU_BITS_REGISTER 10,0 #define OCTEON_FAU_REG_64_ADDR(x) ((x <<3) + OCTEON_FAU_REG_64_START) -typedef enum -{ - OCTEON_FAU_REG_64_START = 0, - OCTEON_FAU_REG_OQ_ADDR_INDEX = OCTEON_FAU_REG_64_ADDR(0), - OCTEON_FAU_REG_OQ_ADDR_END = OCTEON_FAU_REG_64_ADDR(31), - OCTEON_FAU_REG_64_END = OCTEON_FAU_REG_64_ADDR(39), -} octeon_fau_reg_64_t; +typedef enum { + OCTEON_FAU_REG_64_START = 0, + OCTEON_FAU_REG_OQ_ADDR_INDEX = OCTEON_FAU_REG_64_ADDR(0), + OCTEON_FAU_REG_OQ_ADDR_END = OCTEON_FAU_REG_64_ADDR(31), + OCTEON_FAU_REG_64_END = OCTEON_FAU_REG_64_ADDR(39), +} octeon_fau_reg_64_t; #define OCTEON_FAU_REG_32_ADDR(x) ((x <<2) + OCTEON_FAU_REG_32_START) -typedef enum -{ - OCTEON_FAU_REG_32_START = OCTEON_FAU_REG_64_END, - OCTEON_FAU_REG_32_END = OCTEON_FAU_REG_32_ADDR(0), -} octeon_fau_reg_32_t; +typedef enum { + OCTEON_FAU_REG_32_START = OCTEON_FAU_REG_64_END, + OCTEON_FAU_REG_32_END = OCTEON_FAU_REG_32_ADDR(0), +} octeon_fau_reg_32_t; @@ -108,13 +106,14 @@ * 22 bits are available. * @return Address to read from for atomic update */ -static inline uint64_t octeon_fau_atomic_address (uint64_t tagwait, uint64_t reg, - int64_t value) +static inline uint64_t +octeon_fau_atomic_address(uint64_t tagwait, uint64_t reg, + int64_t value) { - return (OCTEON_ADD_IO_SEG(OCTEON_FAU_LOAD_IO_ADDRESS) | - octeon_build_bits(OCTEON_FAU_BITS_INEVAL, value) | - octeon_build_bits(OCTEON_FAU_BITS_TAGWAIT, tagwait) | - octeon_build_bits(OCTEON_FAU_BITS_REGISTER, reg)); + return (OCTEON_ADD_IO_SEG(OCTEON_FAU_LOAD_IO_ADDRESS) | + octeon_build_bits(OCTEON_FAU_BITS_INEVAL, value) | + octeon_build_bits(OCTEON_FAU_BITS_TAGWAIT, tagwait) | + octeon_build_bits(OCTEON_FAU_BITS_REGISTER, reg)); } @@ -131,11 +130,12 @@ * - Step by 8 for 64 bit access. * Returns Address to store for atomic update */ -static inline uint64_t octeon_fau_store_address (uint64_t noadd, uint64_t reg) +static inline uint64_t +octeon_fau_store_address(uint64_t noadd, uint64_t reg) { - return (OCTEON_ADD_IO_SEG(OCTEON_FAU_LOAD_IO_ADDRESS) | - octeon_build_bits(OCTEON_FAU_BITS_NOADD, noadd) | - octeon_build_bits(OCTEON_FAU_BITS_REGISTER, reg)); + return (OCTEON_ADD_IO_SEG(OCTEON_FAU_LOAD_IO_ADDRESS) | + octeon_build_bits(OCTEON_FAU_BITS_NOADD, noadd) | + octeon_build_bits(OCTEON_FAU_BITS_REGISTER, reg)); } @@ -148,9 +148,10 @@ * - Step by 4 for 32 bit access. * @param value Signed value to add. */ -static inline void octeon_fau_atomic_add32 (octeon_fau_reg_32_t reg, int32_t value) +static inline void +octeon_fau_atomic_add32(octeon_fau_reg_32_t reg, int32_t value) { - oct_write32(octeon_fau_store_address(0, reg), value); + oct_write32(octeon_fau_store_address(0, reg), value); } /* @@ -162,11 +163,12 @@ * Note: Only the low 22 bits are available. * returns Value of the register before the update */ -static inline int64_t octeon_fau_fetch_and_add64 (octeon_fau_reg_64_t reg, - int64_t val64) +static inline int64_t +octeon_fau_fetch_and_add64(octeon_fau_reg_64_t reg, + int64_t val64) { - return (oct_read64(octeon_fau_atomic_address(0, reg, val64))); + return (oct_read64(octeon_fau_atomic_address(0, reg, val64))); } /* @@ -178,10 +180,11 @@ * Note: Only the low 22 bits are available. * returns Value of the register before the update */ -static inline int32_t octeon_fau_fetch_and_add32 (octeon_fau_reg_64_t reg, - int32_t val32) +static inline int32_t +octeon_fau_fetch_and_add32(octeon_fau_reg_64_t reg, + int32_t val32) { - return (oct_read32(octeon_fau_atomic_address(0, reg, val32))); + return (oct_read32(octeon_fau_atomic_address(0, reg, val32))); } /* @@ -193,9 +196,10 @@ * - Step by 4 for 32 bit access. * @param value Signed value to write. */ -static inline void octeon_fau_atomic_write32(octeon_fau_reg_32_t reg, int32_t value) +static inline void +octeon_fau_atomic_write32(octeon_fau_reg_32_t reg, int32_t value) { - oct_write32(octeon_fau_store_address(1, reg), value); + oct_write32(octeon_fau_store_address(1, reg), value); } @@ -208,15 +212,17 @@ * - Step by 8 for 64 bit access. * value Signed value to write. */ -static inline void octeon_fau_atomic_write64 (octeon_fau_reg_64_t reg, int64_t value) +static inline void +octeon_fau_atomic_write64(octeon_fau_reg_64_t reg, int64_t value) { - oct_write64(octeon_fau_store_address(1, reg), value); + oct_write64(octeon_fau_store_address(1, reg), value); } -static inline void octeon_fau_atomic_add64 (octeon_fau_reg_64_t reg, int64_t value) +static inline void +octeon_fau_atomic_add64(octeon_fau_reg_64_t reg, int64_t value) { - oct_write64_int64(octeon_fau_store_address(0, reg), value); + oct_write64_int64(octeon_fau_store_address(0, reg), value); } @@ -225,4 +231,4 @@ extern void octeon_fau_disable(void); -#endif /* ___OCTEON_FAU__H___ */ +#endif /* ___OCTEON_FAU__H___ */ ==== //depot/projects/mips2-jnpr/src/sys/dev/rgmii/octeon_fpa.c#2 (text+ko) ==== @@ -1,5 +1,5 @@ /* -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights +Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights reserved. Redistribution and use in source and binary forms, with or without @@ -17,25 +17,25 @@ * Neither the name of Cavium Networks nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written - permission. + permission. -This Software, including technical data, may be subject to U.S. export -control laws, including the U.S. Export Administration Act and its -associated regulations, and may be subject to export or import -regulations in other countries. You warrant that You will comply -strictly in all respects with all such regulations and acknowledge that -you have the responsibility to obtain licenses to export, re-export or -import the Software. +This Software, including technical data, may be subject to U.S. export +control laws, including the U.S. Export Administration Act and its +associated regulations, and may be subject to export or import +regulations in other countries. You warrant that You will comply +strictly in all respects with all such regulations and acknowledge that +you have the responsibility to obtain licenses to export, re-export or +import the Software. -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS -OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT -TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY -REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT -DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF -TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, -LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION -OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR +TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" +AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS +OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT +TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY +REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT +DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF +TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, +LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION +OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. */ @@ -56,70 +56,74 @@ #include "octeon_fpa.h" -//#define FPA_DEBUG 1 +// +#define FPA_DEBUG 1 /* * octeon_dump_fpa * */ -void octeon_dump_fpa (void) +void +octeon_dump_fpa(void) { - int i; - octeon_fpa_ctl_status_t status; - octeon_fpa_queue_available_t q_avail; + int i; + octeon_fpa_ctl_status_t status; + octeon_fpa_queue_available_t q_avail; - status.word64 = oct_read64(OCTEON_FPA_CTL_STATUS); - if (!status.bits.enb) { - printf("\n FPA Disabled"); - /* - * No dumping if disabled - */ - return; - } - printf(" FPA Ctrl-Status-reg 0x%llX := 0x%llX EN %X M1_E %X M0_E %X\n", - OCTEON_FPA_CTL_STATUS, status.word64, - status.bits.enb, status.bits.mem1_err, status.bits.mem0_err); - for (i = 0; i < OCTEON_FPA_QUEUES; i++) { - printf(" Pool: %d\n", i); + status.word64 = oct_read64(OCTEON_FPA_CTL_STATUS); + if (!status.bits.enb) { + printf("\n FPA Disabled"); + /* + * No dumping if disabled + */ + return; + } + printf(" FPA Ctrl-Status-reg 0x%llX := 0x%llX EN %X M1_E %X M0_E %X\n", + OCTEON_FPA_CTL_STATUS, status.word64, + status.bits.enb, status.bits.mem1_err, status.bits.mem0_err); + for (i = 0; i < OCTEON_FPA_QUEUES; i++) { + printf(" Pool: %d\n", i); - q_avail.word64 = oct_read64((OCTEON_FPA_QUEUE_AVAILABLE + (i)*8ull)); - printf(" Avail-reg 0x%llX := Size: 0x%X\n", - (OCTEON_FPA_QUEUE_AVAILABLE + (i)*8ull), q_avail.bits.queue_size); - } + q_avail.word64 = oct_read64((OCTEON_FPA_QUEUE_AVAILABLE + (i) * 8ull)); + printf(" Avail-reg 0x%llX := Size: 0x%X\n", + (OCTEON_FPA_QUEUE_AVAILABLE + (i) * 8ull), q_avail.bits.queue_size); + } } -void octeon_dump_fpa_pool (u_int pool) +void +octeon_dump_fpa_pool(u_int pool) { - octeon_fpa_ctl_status_t status; - octeon_fpa_queue_available_t q_avail; + octeon_fpa_ctl_status_t status; + octeon_fpa_queue_available_t q_avail; - status.word64 = oct_read64(OCTEON_FPA_CTL_STATUS); - if (!status.bits.enb) { - printf("\n FPA Disabled"); - /* - * No dumping if disabled - */ - return; - } - printf(" FPA Ctrl-Status-reg 0x%llX := 0x%llX EN %X M1_E %X M0_E %X\n", - OCTEON_FPA_CTL_STATUS, status.word64, - status.bits.enb, status.bits.mem1_err, status.bits.mem0_err); - q_avail.word64 = oct_read64((OCTEON_FPA_QUEUE_AVAILABLE + (pool)*8ull)); - printf(" FPA Pool: %u Avail-reg 0x%llX := Size: 0x%X\n", pool, - (OCTEON_FPA_QUEUE_AVAILABLE + (pool)*8ull), q_avail.bits.queue_size); + status.word64 = oct_read64(OCTEON_FPA_CTL_STATUS); + if (!status.bits.enb) { + printf("\n FPA Disabled"); + /* + * No dumping if disabled + */ + return; + } + printf(" FPA Ctrl-Status-reg 0x%llX := 0x%llX EN %X M1_E %X M0_E %X\n", + OCTEON_FPA_CTL_STATUS, status.word64, + status.bits.enb, status.bits.mem1_err, status.bits.mem0_err); + q_avail.word64 = oct_read64((OCTEON_FPA_QUEUE_AVAILABLE + (pool) * 8ull)); + printf(" FPA Pool: %u Avail-reg 0x%llX := Size: 0x%X\n", pool, + (OCTEON_FPA_QUEUE_AVAILABLE + (pool) * 8ull), q_avail.bits.queue_size); } -u_int octeon_fpa_pool_size (u_int pool) +u_int +octeon_fpa_pool_size(u_int pool) { - octeon_fpa_queue_available_t q_avail; - u_int size = 0; + octeon_fpa_queue_available_t q_avail; + u_int size = 0; - if (pool < 7) { - q_avail.word64 = oct_read64((OCTEON_FPA_QUEUE_AVAILABLE + (pool)*8ull)); - size = q_avail.bits.queue_size; - } - return (size); + if (pool < 7) { + q_avail.word64 = oct_read64((OCTEON_FPA_QUEUE_AVAILABLE + (pool) * 8ull)); + size = q_avail.bits.queue_size; + } + return (size); } @@ -128,29 +132,31 @@ * * configure fpa with defaults and then mark it enabled. */ -void octeon_enable_fpa (void) +void +octeon_enable_fpa(void) { - int i; - octeon_fpa_ctl_status_t status; - octeon_fpa_fpf_marks_t marks; + int i; + octeon_fpa_ctl_status_t status; + octeon_fpa_fpf_marks_t marks; - for (i = 0; i < OCTEON_FPA_QUEUES; i++) { - marks.word64 = oct_read64((OCTEON_FPA_FPF_MARKS + (i)*8ull)); + for (i = 0; i < OCTEON_FPA_QUEUES; i++) { + marks.word64 = oct_read64((OCTEON_FPA_FPF_MARKS + (i) * 8ull)); - marks.bits.fpf_wr = 0xe0; - oct_write64((OCTEON_FPA_FPF_MARKS + (i)*8ull), marks.word64); - } + marks.bits.fpf_wr = 0xe0; + oct_write64((OCTEON_FPA_FPF_MARKS + (i) * 8ull), marks.word64); + } - /* Enforce a 10 cycle delay between config and enable */ - octeon_wait(10); + /* Enforce a 10 cycle delay between config and enable */ + octeon_wait(10); - status.word64 = 0; - status.bits.enb = 1; - oct_write64(OCTEON_FPA_CTL_STATUS, status.word64); + status.word64 = 0; + status.bits.enb = 1; + oct_write64(OCTEON_FPA_CTL_STATUS, status.word64); } -//#define FPA_DEBUG_TERSE 1 +// +#define FPA_DEBUG_TERSE 1 /* * octeon_fpa_fill_pool_mem @@ -158,70 +164,71 @@ * Fill the specified FPA pool with elem_num number of * elements of size elem_size_words * 8 */ -void octeon_fpa_fill_pool_mem (u_int pool, u_int elem_size_words, u_int elem_num) +void +octeon_fpa_fill_pool_mem(u_int pool, u_int elem_size_words, u_int elem_num) { - void *memory; - u_int bytes, elem_size_bytes; - u_int block_size; + void *memory; + u_int bytes, elem_size_bytes; + u_int block_size; #ifdef FPA_DEBUG - u_int elems = elem_num; - printf(" FPA fill: Pool %u elem_size_words %u Num: %u\n", pool, elem_size_words, elem_num); + u_int elems = elem_num; + + printf(" FPA fill: Pool %u elem_size_words %u Num: %u\n", pool, elem_size_words, elem_num); #endif - elem_size_bytes = elem_size_words * sizeof(uint64_t); - block_size = OCTEON_ALIGN(elem_size_bytes); + elem_size_bytes = elem_size_words * sizeof(uint64_t); + block_size = OCTEON_ALIGN(elem_size_bytes); -// block_size = ((elem_size_bytes / OCTEON_FPA_POOL_ALIGNMENT) + 1) * OCTEON_FPA_POOL_ALIGNMENT; + //block_size = ((elem_size_bytes / OCTEON_FPA_POOL_ALIGNMENT) + 1) * OCTEON_FPA_POOL_ALIGNMENT; - bytes = (elem_num * block_size); + bytes = (elem_num * block_size); #ifdef FPA_DEBUG - printf(" elem_size_bytes = words * 8 = %u; block_size %u\n", elem_size_bytes, block_size); + printf(" elem_size_bytes = words * 8 = %u; block_size %u\n", elem_size_bytes, block_size); #endif #ifdef FPA_DEBUG - int block = 0; + int block = 0; - printf(" %% Filling Pool %u with %u blocks of %u bytes %u words\n", - pool, elem_num, elem_size_bytes, elem_size_words); + printf(" %% Filling Pool %u with %u blocks of %u bytes %u words\n", + pool, elem_num, elem_size_bytes, elem_size_words); #endif -// memory = malloc(bytes, M_DEVBUF, M_NOWAIT | M_ZERO); - memory = contigmalloc(bytes, M_DEVBUF, M_NOWAIT | M_ZERO, - 0, 0x20000000, - OCTEON_FPA_POOL_ALIGNMENT, 0); + //memory = malloc(bytes, M_DEVBUF, M_NOWAIT | M_ZERO); + memory = contigmalloc(bytes, M_DEVBUF, M_NOWAIT | M_ZERO, + 0, 0x20000000, + OCTEON_FPA_POOL_ALIGNMENT, 0); - if (memory == NULL) { - printf(" %% FPA pool %u could not be filled with %u bytes\n", - pool, bytes); - return; - } - - /* - * Forward Align allocated mem to needed alignment. Don't worry about growth, we - * already preallocated extra - */ + if (memory == NULL) { + printf(" %% FPA pool %u could not be filled with %u bytes\n", + pool, bytes); + return; + } + /* + * Forward Align allocated mem to needed alignment. Don't worry + * about growth, we already preallocated extra + */ #ifdef FPA_DEBUG - printf(" %% Huge MemBlock 0x%X Bytes %u\n", memory, bytes); + printf(" %% Huge MemBlock 0x%X Bytes %u\n", memory, bytes); #endif - memory = (void *) OCTEON_ALIGN(memory); + memory = (void *)OCTEON_ALIGN(memory); #ifdef FPA_DEBUG_TERSE - printf("FPA fill: %u Count: %u SizeBytes: %u SizeBytesAligned: %u 1st: 0x%X = 0x%X\n", - pool, elem_num, elem_size_bytes, block_size, memory, OCTEON_PTR2PHYS(memory)); + printf("FPA fill: %u Count: %u SizeBytes: %u SizeBytesAligned: %u 1st: 0x%X = 0x%X\n", + pool, elem_num, elem_size_bytes, block_size, memory, OCTEON_PTR2PHYS(memory)); #endif -// memory = (void *) ((((u_int) memory / OCTEON_FPA_POOL_ALIGNMENT) + 1) * OCTEON_FPA_POOL_ALIGNMENT); + //memory = (void *)((((u_int)memory / OCTEON_FPA_POOL_ALIGNMENT) + 1) * OCTEON_FPA_POOL_ALIGNMENT); - while (elem_num--) { + while (elem_num--) { #ifdef FPA_DEBUG - if (((elems - elem_num) < 4) || (elem_num < 4)) - printf(" %% Block %d: 0x%X Phys 0x%X Bytes %u\n", block, memory, OCTEON_PTR2PHYS(memory), elem_size_bytes); - block++; + if (((elems - elem_num) < 4) || (elem_num < 4)) + printf(" %% Block %d: 0x%X Phys 0x%X Bytes %u\n", block, memory, OCTEON_PTR2PHYS(memory), elem_size_bytes); + block++; #endif - octeon_fpa_free(memory, pool, 0); - memory = (void *) (((u_int) memory) + block_size); - } + octeon_fpa_free(memory, pool, 0); + memory = (void *)(((u_int)memory) + block_size); + } } ==== //depot/projects/mips2-jnpr/src/sys/dev/rgmii/octeon_fpa.h#2 (text+ko) ==== @@ -1,5 +1,5 @@ /* -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights +Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights reserved. Redistribution and use in source and binary forms, with or without @@ -17,25 +17,25 @@ * Neither the name of Cavium Networks nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written - permission. + permission. -This Software, including technical data, may be subject to U.S. export -control laws, including the U.S. Export Administration Act and its -associated regulations, and may be subject to export or import -regulations in other countries. You warrant that You will comply -strictly in all respects with all such regulations and acknowledge that -you have the responsibility to obtain licenses to export, re-export or -import the Software. +This Software, including technical data, may be subject to U.S. export +control laws, including the U.S. Export Administration Act and its +associated regulations, and may be subject to export or import +regulations in other countries. You warrant that You will comply +strictly in all respects with all such regulations and acknowledge that +you have the responsibility to obtain licenses to export, re-export or +import the Software. -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS -OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT -TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY -REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT -DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF -TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, -LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION -OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR +TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" +AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS +OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT +TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY +REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT +DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF +TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, +LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION +OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. */ @@ -50,7 +50,7 @@ #define ___OCTEON_FPA__H___ -#define OCTEON_FPA_FPA_OUTPUT_BUFFER_POOL 2 /* Same in octeon_rgmx.h */ +#define OCTEON_FPA_FPA_OUTPUT_BUFFER_POOL 2 /* Same in octeon_rgmx.h */ /* @@ -60,13 +60,13 @@ * read free pages from L2C for Queue. */ typedef union { - uint64_t word64; - struct { - uint64_t reserved : 42; /* Must be zero */ - uint64_t fpf_wr : 11; /* Write Hi Water mark */ - uint64_t fpf_rd : 11; /* Read Lo Water mark */ - } bits; -} octeon_fpa_fpf_marks_t; + uint64_t word64; + struct { + uint64_t reserved:42; /* Must be zero */ + uint64_t fpf_wr:11; /* Write Hi Water mark */ + uint64_t fpf_rd:11; /* Read Lo Water mark */ + } bits; +} octeon_fpa_fpf_marks_t; /* @@ -76,14 +76,14 @@ * - Use with the CVMX_FPA_CTL_STATUS CSR. */ typedef union { - uint64_t word64; - struct { - uint64_t reserved : 49; /* Must be zero */ - uint64_t enb : 1; /* Enable */ - uint64_t mem1_err : 7; /* ECC flip 1 */ - uint64_t mem0_err : 7; /* ECC flip 0 */ - } bits; -} octeon_fpa_ctl_status_t; + uint64_t word64; + struct { + uint64_t reserved:49; /* Must be zero */ + uint64_t enb:1; /* Enable */ + uint64_t mem1_err:7; /* ECC flip 1 */ + uint64_t mem0_err:7; /* ECC flip 0 */ + } bits; +} octeon_fpa_ctl_status_t; /* @@ -96,24 +96,24 @@ * - Use with the CVMX_FPA_FPF0_SIZE CSR. */ typedef union { - uint64_t word64; - struct { - uint64_t reserved : 52; /* Must be zero */ - /* - * The number of entries assigned in the FPA FIFO (used to hold - * page-pointers) for this Queue. - * The value of this register must divisable by 2, and the FPA will - * ignore bit [0] of this register. - * The total of the FPF_SIZ field of the 8 (0-7)OCTEON_FPA_FPF#_MARKS - * registers must not exceed 2048. - * After writing this field the FPA will need 10 core clock cycles - * to be ready for operation. The assignment of location in - * the FPA FIFO must start with Queue 0, then 1, 2, etc. - * The number of useable entries will be FPF_SIZ-2. - */ - uint64_t fpf_siz : 12; - } bits; -} octeon_fpa_fpf_size_t; + uint64_t word64; + struct { + uint64_t reserved:52; /* Must be zero */ + /* + * The number of entries assigned in the FPA FIFO (used to + * hold page-pointers) for this Queue. The value of this + * register must divisable by 2, and the FPA will ignore bit + * [0] of this register. The total of the FPF_SIZ field of + * the 8 (0-7)OCTEON_FPA_FPF#_MARKS registers must not + * exceed 2048. After writing this field the FPA will need + * 10 core clock cycles to be ready for operation. The + * assignment of location in the FPA FIFO must start with + * Queue 0, then 1, 2, etc. The number of useable entries + * will be FPF_SIZ-2. + */ + uint64_t fpf_siz:12; + } bits; +} octeon_fpa_fpf_size_t; /* *OCTEON_FPA_INT_ENB = FPA's Interrupt Enable @@ -122,15 +122,15 @@ * - Use with the CVMX_FPA_INT_ENB CSR. */ typedef union { - uint64_t word64; - struct { - uint64_t reserved : 60; /* Must be zero */ - uint64_t fed1_dbe : 1; /* Int iff bit3 Int-Sum set */ - uint64_t fed1_sbe : 1; /* Int iff bit2 Int-Sum set */ - uint64_t fed0_dbe : 1; /* Int iff bit1 Int-Sum set */ - uint64_t fed0_sbe : 1; /* Int iff bit0 Int-Sum set */ - } bits; -} octeon_fpa_int_enb_t; + uint64_t word64; + struct { + uint64_t reserved:60; /* Must be zero */ + uint64_t fed1_dbe:1; /* Int iff bit3 Int-Sum set */ + uint64_t fed1_sbe:1; /* Int iff bit2 Int-Sum set */ + uint64_t fed0_dbe:1; /* Int iff bit1 Int-Sum set */ + uint64_t fed0_sbe:1; /* Int iff bit0 Int-Sum set */ + } bits; +} octeon_fpa_int_enb_t; /** *OCTEON_FPA_INT_SUM = FPA's Interrupt Summary Register @@ -139,15 +139,15 @@ * - Use with the CVMX_FPA_INT_SUM CSR. */ typedef union { - uint64_t word64; - struct { - uint64_t reserved : 60; /**< Must be zero */ - uint64_t fed1_dbe : 1; - uint64_t fed1_sbe : 1; - uint64_t fed0_dbe : 1; - uint64_t fed0_sbe : 1; - } bits; -} octeon_fpa_int_sum_t; + uint64_t word64; + struct { + uint64_t reserved:60; /**< Must be zero */ + uint64_t fed1_dbe:1; + uint64_t fed1_sbe:1; + uint64_t fed0_dbe:1; + uint64_t fed0_sbe:1; + } bits; +} octeon_fpa_int_sum_t; /* @@ -157,12 +157,12 @@ * - Use with the CVMX_FPA_QUEX_AVAILABLE(0..7) CSR. */ typedef union { - uint64_t word64; - struct { - uint64_t reserved : 38; /* Must be zero */ - uint64_t queue_size : 26; /* free pages available */ - } bits; -} octeon_fpa_queue_available_t; + uint64_t word64; + struct { + uint64_t reserved:38; /* Must be zero */ + uint64_t queue_size:26; /* free pages available */ + } bits; +} octeon_fpa_queue_available_t; /* @@ -170,12 +170,12 @@ * */ typedef union { - uint64_t word64; - struct { - uint64_t reserved : 39; /* Must be zero */ - uint64_t page_index : 25; /* page_index */ - } bits; -} octeon_fpa_queue_page_index_t; + uint64_t word64; + struct { + uint64_t reserved:39; /* Must be zero */ + uint64_t page_index:25; /* page_index */ + } bits; +} octeon_fpa_queue_page_index_t; #define OCTEON_DID_FPA 5ULL @@ -190,9 +190,10 @@ extern void octeon_dump_fpa_pool(u_int pool); extern u_int octeon_fpa_pool_size(u_int pool); extern void octeon_enable_fpa(void); -extern void octeon_fpa_fill_pool_mem(u_int pool, - u_int block_size_words, - u_int block_num); +extern void +octeon_fpa_fill_pool_mem(u_int pool, + u_int block_size_words, + u_int block_num); /* * octeon_fpa_free @@ -204,21 +205,21 @@ * pool is FPA pool num, ptr is block ptr, num_cache_lines is number of * cache lines to invalidate (not written back). */ -static inline void octeon_fpa_free (void *ptr, u_int pool, - u_int num_cache_lines) +static inline void +octeon_fpa_free(void *ptr, u_int pool, + u_int num_cache_lines) { - octeon_addr_t free_ptr; + octeon_addr_t free_ptr; - free_ptr.word64 = (uint64_t) OCTEON_PTR2PHYS(ptr); + free_ptr.word64 = (uint64_t) OCTEON_PTR2PHYS(ptr); - free_ptr.sfilldidspace.didspace = OCTEON_ADDR_DIDSPACE( - OCTEON_ADDR_FULL_DID(OCTEON_DID_FPA, pool)); + free_ptr.sfilldidspace.didspace = OCTEON_ADDR_DIDSPACE( + OCTEON_ADDR_FULL_DID(OCTEON_DID_FPA, pool)); - /* - * Do not 'sync' - * asm volatile ("sync\n"); - */ - oct_write64(free_ptr.word64, num_cache_lines); + /* + * Do not 'sync' asm volatile ("sync\n"); + */ + oct_write64(free_ptr.word64, num_cache_lines); } @@ -230,32 +231,34 @@ * * Buffer passes away from FPA management to SW control */ -static inline void *octeon_fpa_alloc (u_int pool) +static inline void * +octeon_fpa_alloc(u_int pool) { - uint64_t address; + uint64_t address; - address = oct_read64(OCTEON_ADDR_DID(OCTEON_ADDR_FULL_DID(OCTEON_DID_FPA, - pool))); - if (address) { + address = oct_read64(OCTEON_ADDR_DID(OCTEON_ADDR_FULL_DID(OCTEON_DID_FPA, + pool))); + if (address) { /* * 32 bit FPA pointers only */ - /* - * We only use 32 bit pointers at this time - */ - return ((void *) OCTEON_PHYS2PTR(address & 0xffffffff)); - } - return (NULL); + /* + * We only use 32 bit pointers at this time + */ + return ((void *)OCTEON_PHYS2PTR(address & 0xffffffff)); + } + return (NULL); } -static inline uint64_t octeon_fpa_alloc_phys (u_int pool) +static inline uint64_t +octeon_fpa_alloc_phys(u_int pool) { - return (oct_read64(OCTEON_ADDR_DID(OCTEON_ADDR_FULL_DID(OCTEON_DID_FPA, - pool)))); + return (oct_read64(OCTEON_ADDR_DID(OCTEON_ADDR_FULL_DID(OCTEON_DID_FPA, + pool)))); } @@ -268,20 +271,21 @@ * * Buffer passes away from FPA management to SW control */ -static inline void *octeon_fpa_alloc (u_int pool) +static inline void * +octeon_fpa_alloc(u_int pool) { - uint64_t address; + uint64_t address; >>> TRUNCATED FOR MAIL (1000 lines) <<<
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