Date: Fri, 10 Dec 2010 00:30:15 +0200 From: Andriy Gapon <avg@freebsd.org> To: Jung-uk Kim <jkim@freebsd.org> Cc: svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org Subject: Re: svn commit: r216337 - head/sys/x86/x86 Message-ID: <4D015877.5020503@freebsd.org> In-Reply-To: <201012092129.oB9LTakd051314@svn.freebsd.org> References: <201012092129.oB9LTakd051314@svn.freebsd.org>
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on 09/12/2010 23:29 Jung-uk Kim said the following: > Author: jkim > Date: Thu Dec 9 21:29:36 2010 > New Revision: 216337 > URL: http://svn.freebsd.org/changeset/base/216337 > > Log: > Remove AMD Family 0Fh, Model 6Bh, Stepping 2 from the list of P-state > invariant CPUs. I do not believe this model is P-state invariant any more. I wonder why we had and have all those additional checks at all. Don't we trust AMDPM_TSC_INVARIANT bit to be set correctly? Especially for the AMD CPUs, not sure about Intel ones. > Maybe cpufreq(4) was broken at the time of commit. :-( > > Modified: > head/sys/x86/x86/tsc.c > > Modified: head/sys/x86/x86/tsc.c > ============================================================================== > --- head/sys/x86/x86/tsc.c Thu Dec 9 21:11:53 2010 (r216336) > +++ head/sys/x86/x86/tsc.c Thu Dec 9 21:29:36 2010 (r216337) > @@ -107,7 +107,7 @@ init_TSC(void) > switch (cpu_vendor_id) { > case CPU_VENDOR_AMD: > if ((amd_pminfo & AMDPM_TSC_INVARIANT) || > - CPUID_TO_FAMILY(cpu_id) >= 0x10 || cpu_id == 0x60fb2) > + CPUID_TO_FAMILY(cpu_id) >= 0x10) > tsc_is_invariant = 1; > break; > case CPU_VENDOR_INTEL: -- Andriy Gapon
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