Date: Thu, 25 May 2000 02:05:21 -0600 From: Chuck Paterson <cp@bsdi.com> To: Matthew Dillon <dillon@apollo.backplane.com> Cc: Terry Lambert <tlambert@primenet.com>, arch@freebsd.org Subject: Re: Preemptive kernel on older X86 hardware Message-ID: <200005250805.CAA19058@berserker.bsdi.com>
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} } No, such small numbers aren't that important. Do you want me } to tell you what the cost of an L2 cache miss is with a *normal* } memory read? You might be surprised how bad it is. } } -Matt } Matthew Dillon } <dillon@backplane.com> } Actually it wouldn't suprise me anymore. We had a case where locking wasn't quite right in some tlb shoot down code. The shooter managed to get out of pmap and back in again while the shootie was trying to recover from the page it had removed from the tlb and access one or two cache line. Chuck To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-arch" in the body of the message
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