Date: Tue, 6 Apr 2010 19:00:35 +0000 (UTC) From: Juli Mallett <jmallett@FreeBSD.org> To: src-committers@freebsd.org, svn-src-user@freebsd.org Subject: svn commit: r206282 - user/jmallett/octeon/sys/mips/mips Message-ID: <201004061900.o36J0Zvi051587@svn.freebsd.org>
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Author: jmallett Date: Tue Apr 6 19:00:35 2010 New Revision: 206282 URL: http://svn.freebsd.org/changeset/base/206282 Log: o) Set PX in addition to UX, KX and SX. o) Don't mask off UX, KX and SX bits when returning from user exceptions and interrupts. We leave those bits set in userland and intend to. This blows up on N64. o) Adjust NUSERPGTBLS. Modified: user/jmallett/octeon/sys/mips/mips/exception.S user/jmallett/octeon/sys/mips/mips/pmap.c Modified: user/jmallett/octeon/sys/mips/mips/exception.S ============================================================================== --- user/jmallett/octeon/sys/mips/mips/exception.S Tue Apr 6 18:57:50 2010 (r206281) +++ user/jmallett/octeon/sys/mips/mips/exception.S Tue Apr 6 19:00:35 2010 (r206282) @@ -472,7 +472,7 @@ NNON_LEAF(MipsUserGenException, CALLFRAM # Turn off fpu and enter kernel mode and t0, a0, ~(SR_COP_1_BIT | SR_EXL | SR_KSU_MASK | SR_INT_ENAB) #ifdef TARGET_OCTEON - or t0, t0, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX) + or t0, t0, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX | MIPS32_SR_PX) #endif mtc0 t0, COP_0_STATUS_REG PTR_ADDU a0, k1, U_PCB_REGS @@ -491,10 +491,7 @@ NNON_LEAF(MipsUserGenException, CALLFRAM */ DO_AST - mfc0 t0, COP_0_STATUS_REG # disable int - and t0, t0, ~(MIPS_SR_INT_IE) - mtc0 t0, COP_0_STATUS_REG - ITLBNOPFIX + CLEAR_STATUS /* * The use of k1 for storing the PCB pointer must be done only @@ -551,9 +548,6 @@ NNON_LEAF(MipsUserGenException, CALLFRAM RESTORE_U_PCB_REG(k0, SR, k1) RESTORE_U_PCB_REG(s8, S8, k1) RESTORE_U_PCB_REG(ra, RA, k1) -#ifdef TARGET_OCTEON - and k0, k0, ~(MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX) -#endif .set noat RESTORE_U_PCB_REG(AT, AST, k1) @@ -693,7 +687,7 @@ NNON_LEAF(MipsUserIntr, CALLFRAME_SIZ, r # Turn off fpu, disable interrupts, set kernel mode kernel mode, clear exception level. and t0, a0, ~(SR_COP_1_BIT | SR_EXL | SR_INT_ENAB | SR_KSU_MASK) #ifdef TARGET_OCTEON - or t0, t0, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX) + or t0, t0, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX | MIPS32_SR_PX) #endif mtc0 t0, COP_0_STATUS_REG ITLBNOPFIX @@ -725,10 +719,7 @@ NNON_LEAF(MipsUserIntr, CALLFRAME_SIZ, r /* * Restore user registers and return. */ - mfc0 t0, COP_0_STATUS_REG # disable int - and t0, t0, ~(MIPS_SR_INT_IE) - mtc0 t0, COP_0_STATUS_REG - ITLBNOPFIX + CLEAR_STATUS GET_CPU_PCPU(k1) PTR_L k1, PC_CURPCB(k1) @@ -780,9 +771,6 @@ NNON_LEAF(MipsUserIntr, CALLFRAME_SIZ, r RESTORE_U_PCB_REG(k0, SR, k1) RESTORE_U_PCB_REG(sp, SP, k1) RESTORE_U_PCB_REG(ra, RA, k1) -#ifdef TARGET_OCTEON - and k0, k0, ~(MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX) -#endif .set noat RESTORE_U_PCB_REG(AT, AST, k1) @@ -987,6 +975,10 @@ NLEAF(MipsTLBMissException) andi k0, k0, 0x1ffc # k0=page tab offset PTR_ADDU k1, k1, k0 # k1=pte address lw k0, 0(k1) # k0=lo0 pte + andi k0, PG_V + beqz k0, MipsKernGenException # no PTE + nop + lw k0, 0(k1) # k0=lo0 pte CLEAR_PTE_SWBITS(k0) MTC0 k0, COP_0_TLB_LO0 # lo0 is loaded COP0_SYNC Modified: user/jmallett/octeon/sys/mips/mips/pmap.c ============================================================================== --- user/jmallett/octeon/sys/mips/mips/pmap.c Tue Apr 6 18:57:50 2010 (r206281) +++ user/jmallett/octeon/sys/mips/mips/pmap.c Tue Apr 6 19:00:35 2010 (r206282) @@ -117,12 +117,22 @@ __FBSDID("$FreeBSD$"); /* * Get PDEs and PTEs for user/kernel address space + * + * XXX The & for pmap_segshift() is wrong, as is the fact that it doesn't + * trim off gratuitous bits of the address space. By having the & + * there, we break defining NUSERPGTBLS below because the address space + * is defined such that it ends immediately after NPDEPG*NPTEPG*PAGE_SIZE, + * so we end up getting NUSERPGTBLS of 0. */ #define pmap_segshift(v) (((v) >> SEGSHIFT) & (NPDEPG - 1)) #define pmap_pde(m, v) (&((m)->pm_segtab[pmap_segshift((v))])) #define segtab_pde(m, v) ((m)[pmap_segshift((v))]) +#if defined(__mips_n64) +#define NUSERPGTBLS (NPDEPG) +#else #define NUSERPGTBLS (pmap_segshift(VM_MAXUSER_ADDRESS)) +#endif #define mips_segtrunc(va) ((va) & ~SEGOFSET) #define is_kernel_pmap(x) ((x) == kernel_pmap)
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