Date: Tue, 10 May 2011 11:06:52 -0600 From: Warner Losh <imp@bsdimp.com> To: Adrian Chadd <adrian@freebsd.org> Cc: freebsd-hackers@freebsd.org, Damjan Marion <damjan.marion@gmail.com>, Marius Strobl <marius@alchemy.franken.de> Subject: Re: Embedded switch instead of stadard PHY Message-ID: <D42F3392-089E-4F1D-BCE6-E4789699C318@bsdimp.com> In-Reply-To: <BANLkTinUuwPELEw7PPeupNPCuXyML=DotA@mail.gmail.com> References: <34CF3ED0-52BC-4D0E-922A-FE26F624E77F@gmail.com> <20110508131643.GA23650@alchemy.franken.de> <BANLkTinUuwPELEw7PPeupNPCuXyML=DotA@mail.gmail.com>
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On May 9, 2011, at 12:30 AM, Adrian Chadd wrote: > On 8 May 2011 21:16, Marius Strobl <marius@alchemy.franken.de> wrote: >=20 > [snip] >=20 >> Depends on what you understand by properly. One idea I particularly >> like is to handle switch ports as pseudo-interfaces hanging off of = the >> the MAC driver parent roughly similar to vlan(4). That way you'd have >> per port link status and could configure the media. >=20 > The reason I like this is because I realise that these switch PHYs > tend to have quite a bit of varying but useful functionality, that > isn't just "multi-port single-VLAN switch PHY." >=20 > Besides there being per-port status, there can also be per-port > error/packet/byte counts, VLAN setups (tagged/untagged), QoS > configuration, sometimes some L2 filtering and (even more creepy) > sometimes L3 filtering/routing. >=20 > They can sometimes hang off the MII bus, but ISTR datasheets which > show they can hang off an SPI bus too. So although they can look like > PHYs complete with the register layouts, there's extended commands to > implement other features as well. There may even be more than one CPU > ethernet port hooked up - I think the Routerstation Pro has both CPU > GigE ports wired to the switch PHY and defaults to mapping port 1 -> > arge0 and Port 2,3,4,5 -> arge1. >=20 > I'd really appreciate it if someone were able to sit down, take the > existing work done by Luiz and others and flesh out a bare minimum set > of switch PHY drivers that configure them with some sensible defaults > (rather than leaving it up to the boot firmware to do it for you) and > have all of the interface/configuration glue in the kernel. As I said > earlier, figuring out how to expose all the functionality - including > per-port error counts and such - can come later. Yes. Agreed. Stated a bit more elegantly than I just did... Handling = non-localized connections is critical here. The embedded world has a = lot of funky interconnects that map poorly into our device model. = Having the association handled at a higher level will help us connect = these things. In the designs I've seen, this can happen both for the = switches we're talking about, as well as PHYs. I believe there are some = CPUs where talking to the PHY doesn't go through the MAC.... Warner=
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