Date: Mon, 22 Sep 2014 20:10:46 +0000 (UTC) From: Marcel Moolenaar <marcel@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r271998 - stable/10/sys/ia64/ia64 Message-ID: <201409222010.s8MKAkpT094749@svn.freebsd.org>
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Author: marcel Date: Mon Sep 22 20:10:45 2014 New Revision: 271998 URL: http://svnweb.freebsd.org/changeset/base/271998 Log: Make sure all memory updates are made visible before we let go of the thread in cpu_switch(). It's otherwise possible that on another CPU the thread continues from stale context data. Note that this is prominent on newer CPUs, like the Montecito, that really take advantage of the weak memory ordering. First generation Itanium 2 is not that aggressive and does not need this. This is a direct commit to stable/10. Approved by: re@ (gjb) Modified: stable/10/sys/ia64/ia64/machdep.c Modified: stable/10/sys/ia64/ia64/machdep.c ============================================================================== --- stable/10/sys/ia64/ia64/machdep.c Mon Sep 22 20:04:59 2014 (r271997) +++ stable/10/sys/ia64/ia64/machdep.c Mon Sep 22 20:10:45 2014 (r271998) @@ -465,6 +465,8 @@ cpu_switch(struct thread *old, struct th oldpcb->pcb_current_pmap = pmap_switch(newpcb->pcb_current_pmap); + ia64_mf(); + atomic_store_rel_ptr(&old->td_lock, mtx); #if defined(SCHED_ULE) && defined(SMP)
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