Date: Tue, 13 Apr 1999 16:19:06 -0700 From: Mike Smith <mike@smith.net.au> To: Dennis <dennis@etinc.com> Cc: Mike Smith <mike@smith.net.au>, hackers@freebsd.org Subject: Re: PCI burst determination Message-ID: <199904132319.QAA01942@dingo.cdrom.com> In-Reply-To: Your message of "Tue, 13 Apr 1999 18:02:51 EDT." <199904132309.TAA07157@etinc.com>
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> At 02:27 PM 4/13/99 -0700, Mike Smith wrote: > >> > >> Is there a way to determine the max burst of the PCI bridge on the > >> MB for controller optimization? I dont see a fuction...is it stored > >> somewhere? > > > >PCI is arbitrated with a latency timer, so there is no maximum burst > >length per se. As for limitations in the bridge chipset, you're > >probably going to want to look up the documentation for the individual > >bridges. > > > >However, having said, that, as a general rule with PCI bursting "longer > >is better". > > Well, mike, the goal of my question was to be able to dynamically determine > the burst rate of the bridge installed to tune it at config time, allowing > for automatic optimization. I fail to see any utility in this. Bursts are terminated either by the initiator or the arbiter; it's irrelevant as to which does the termination from a performance standpoint. As the designer of the initiator, you should just open up with a burst when you have data, and keep going until you either run out of data or you get arbited off the bus. There's no other behaviour model that makes any sense; why would you want to try to second-guess the exact count at which the bridge (which typically contains the arbiter) is going to cut you off? That's its job, let it do it. -- \\ Sometimes you're ahead, \\ Mike Smith \\ sometimes you're behind. \\ mike@smith.net.au \\ The race is long, and in the \\ msmith@freebsd.org \\ end it's only with yourself. \\ msmith@cdrom.com To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hackers" in the body of the message
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