Date: Tue, 30 Jan 1996 13:34:00 -0700 (MST) From: Terry Lambert <terry@lambert.org> To: wscott@pdxlx008.intel.com (Wayne Scott) Cc: bde@zeta.org.au, terry@lambert.org, current@freefall.freebsd.org, dyson@freefall.freebsd.org Subject: Re: Optimization topics Message-ID: <199601302034.NAA07203@phaeton.artisoft.com> In-Reply-To: <199601301837.KAA07469@pdxlx008.intel.com.intel.com> from "Wayne Scott" at Jan 30, 96 10:37:55 am
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> I might have an easier solution for you. > > The Pentium Pro has a misaligned access performance counter that has > the ability to generate interrupts. You can tell the processor to > count misaligns and generate an interrupt every 1000 times it sees > one. > > Put this into you existing profiling code and you will get a profile > of where the system is doing misaligned references. Now you only need > to fix the very common cases in the critical paths. > > The same thing can be done which all the counters. Which branches are > not predicted well, where am I missing the cache, etc... > > The information is in the P6 PRM that should be available next month... I want a MIPS port. All unaligned access is to be forbidden, not just where it may impact performance. Unaligned access is one of the things tying Win95 to Intel. Terry Lambert terry@lambert.org --- Any opinions in this posting are my own and not those of my present or previous employers.
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