Date: Fri, 6 Aug 2004 11:27:27 -0400 From: John Baldwin <jhb@FreeBSD.org> To: Scott Long <scottl@samsco.org> Cc: Tim Robbins <tjr@FreeBSD.org> Subject: Re: Atomic operations on i386/amd64 Message-ID: <200408061127.27691.jhb@FreeBSD.org> In-Reply-To: <4112FE79.4020007@samsco.org> References: <20040805050422.GA41201@cat.robbins.dropbear.id.au> <200408051759.53079.jhb@FreeBSD.org> <4112FE79.4020007@samsco.org>
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On Thursday 05 August 2004 11:43 pm, Scott Long wrote: > John Baldwin wrote: > > On Thursday 05 August 2004 01:04 am, Tim Robbins wrote: > >>Is there any particular reason why atomic_load_acq_*() and > >>atomic_store_rel_*() are implemented with CMPXCHG and XCHG instead of > >>MOV on i386/amd64 UP? > > > > Actually, using mov instead of lock xchg for store_rel reduced > > performance in some benchmarks Scott ran on an SMP machine, I'm guessing > > due to the higher latency of locks becoming available to other CPUs. I'm > > still waiting for benchmark results on UP to see if the change should be > > made under #ifndef SMP or some such. > > Your patch appears to slightly pessimize UP as well and SMP. Hmm, well so much for LOCK XCHG being evil then I guess. This points out that we should really benchmark the *FENCE changes to see if they help or hurt as well before committing them. -- John Baldwin <jhb@FreeBSD.org> <>< http://www.FreeBSD.org/~jhb/ "Power Users Use the Power to Serve" = http://www.FreeBSD.org
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