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Date:      Tue, 23 Jun 2009 16:07:56 +0000 (UTC)
From:      Robert Noland <rnoland@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-7@freebsd.org
Subject:   svn commit: r194733 - in stable/7/sys: . contrib/pf dev/drm
Message-ID:  <200906231607.n5NG7u1R082339@svn.freebsd.org>

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Author: rnoland
Date: Tue Jun 23 16:07:56 2009
New Revision: 194733
URL: http://svn.freebsd.org/changeset/base/194733

Log:
  Merge 190831 from HEAD
  
  Add regs required for occlusion queries support

Modified:
  stable/7/sys/   (props changed)
  stable/7/sys/contrib/pf/   (props changed)
  stable/7/sys/dev/drm/r300_cmdbuf.c
  stable/7/sys/dev/drm/r300_reg.h
  stable/7/sys/dev/drm/radeon_cp.c
  stable/7/sys/dev/drm/radeon_drv.h

Modified: stable/7/sys/dev/drm/r300_cmdbuf.c
==============================================================================
--- stable/7/sys/dev/drm/r300_cmdbuf.c	Tue Jun 23 16:06:13 2009	(r194732)
+++ stable/7/sys/dev/drm/r300_cmdbuf.c	Tue Jun 23 16:07:56 2009	(r194733)
@@ -208,6 +208,10 @@ void r300_init_reg_flags(struct drm_devi
 	ADD_RANGE(0x42C0, 2);
 	ADD_RANGE(R300_RS_CNTL_0, 2);
 
+	ADD_RANGE(R300_SU_REG_DEST, 1);
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530)
+		ADD_RANGE(RV530_FG_ZBREG_DEST, 1);
+
 	ADD_RANGE(R300_SC_HYPERZ, 2);
 	ADD_RANGE(0x43E8, 1);
 
@@ -233,6 +237,7 @@ void r300_init_reg_flags(struct drm_devi
 	ADD_RANGE(R300_ZB_DEPTHPITCH, 1);
 	ADD_RANGE(R300_ZB_DEPTHCLEARVALUE, 1);
 	ADD_RANGE(R300_ZB_ZMASK_OFFSET, 13);
+	ADD_RANGE(R300_ZB_ZPASS_DATA, 2); /* ZB_ZPASS_DATA, ZB_ZPASS_ADDR */
 
 	ADD_RANGE(R300_TX_FILTER_0, 16);
 	ADD_RANGE(R300_TX_FILTER1_0, 16);

Modified: stable/7/sys/dev/drm/r300_reg.h
==============================================================================
--- stable/7/sys/dev/drm/r300_reg.h	Tue Jun 23 16:06:13 2009	(r194732)
+++ stable/7/sys/dev/drm/r300_reg.h	Tue Jun 23 16:07:56 2009	(r194733)
@@ -1776,6 +1776,11 @@ __FBSDID("$FreeBSD$");
 #define R500_RB3D_COLOR_CLEAR_VALUE_AR  0x46c0
 #define R500_RB3D_CONSTANT_COLOR_AR     0x4ef8
 
+#define R300_SU_REG_DEST                0x42c8
+#define RV530_FG_ZBREG_DEST             0x4be8
+#define R300_ZB_ZPASS_DATA              0x4f58
+#define R300_ZB_ZPASS_ADDR              0x4f5c
+
 #endif /* _R300_REG_H */
 
 /* *INDENT-ON* */

Modified: stable/7/sys/dev/drm/radeon_cp.c
==============================================================================
--- stable/7/sys/dev/drm/radeon_cp.c	Tue Jun 23 16:06:13 2009	(r194732)
+++ stable/7/sys/dev/drm/radeon_cp.c	Tue Jun 23 16:07:56 2009	(r194733)
@@ -436,7 +436,7 @@ static void radeon_init_pipes(drm_radeon
 
 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) {
 		RADEON_WRITE_PLL(R500_DYN_SCLK_PWMEM_PIPE, (1 | ((gb_pipe_sel >> 8) & 0xf) << 4));
-		RADEON_WRITE(R500_SU_REG_DEST, ((1 << dev_priv->num_gb_pipes) - 1));
+		RADEON_WRITE(R300_SU_REG_DEST, ((1 << dev_priv->num_gb_pipes) - 1));
 	}
 	RADEON_WRITE(R300_GB_TILE_CONFIG, gb_tile_config);
 	radeon_do_wait_for_idle(dev_priv);

Modified: stable/7/sys/dev/drm/radeon_drv.h
==============================================================================
--- stable/7/sys/dev/drm/radeon_drv.h	Tue Jun 23 16:06:13 2009	(r194732)
+++ stable/7/sys/dev/drm/radeon_drv.h	Tue Jun 23 16:07:56 2009	(r194733)
@@ -684,7 +684,6 @@ extern void r600_page_table_cleanup(stru
 /* pipe config regs */
 #define R400_GB_PIPE_SELECT             0x402c
 #define R500_DYN_SCLK_PWMEM_PIPE        0x000d /* PLL */
-#define R500_SU_REG_DEST                0x42c8
 #define R300_GB_TILE_CONFIG             0x4018
 #       define R300_ENABLE_TILING       (1 << 0)
 #       define R300_PIPE_COUNT_RV350    (0 << 1)



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