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Date:      Wed, 17 Jun 2015 12:49:19 GMT
From:      pratiksinghal@FreeBSD.org
To:        svn-soc-all@FreeBSD.org
Subject:   socsvn commit: r287236 - soc2015/pratiksinghal/cubie-head/sys/arm/allwinner
Message-ID:  <201506171249.t5HCnJkg047957@socsvn.freebsd.org>

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Author: pratiksinghal
Date: Wed Jun 17 12:49:18 2015
New Revision: 287236
URL: http://svnweb.FreeBSD.org/socsvn/?view=rev&rev=287236

Log:
  Corrected the buffer size for DMA transfer

Modified:
  soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_mmc.c
  soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_mmc.h

Modified: soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_mmc.c
==============================================================================
--- soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_mmc.c	Wed Jun 17 11:48:00 2015	(r287235)
+++ soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_mmc.c	Wed Jun 17 12:49:18 2015	(r287236)
@@ -58,10 +58,11 @@
 #define	A10_MMC_RESSZ		2
 #define A10_MMC_NDESC		16
 #define A10_DMA_NSEGS		16
-#define A10_DMA_BUFF_SIZE	512
+#define A10_DMA_BUFF_SIZE	0x2000 
+#define A10_DMA_MAX_SIZE	0x20000 
 #define A10_MMC_DMA_FTRGLEVEL_A20	0x20070008
 #define A10_MMC_DMA_FTRGLEVEL_A10 	0x00070208
-#define A10_MMC_DMA_MAXLEN   0x10000 
+#define A10_MMC_DMA_MAXLEN  	(A10_DMA_MAX_SIZE)  
 
 struct a10_mmc_softc {
 	bus_space_handle_t	a10_bsh;
@@ -228,6 +229,7 @@
 			sc->a10_use_dma = 0 ;
 		}
 	}
+	sc->a10_dma_buff_addr = 0;
 #ifdef DEBUG
 	device_printf(sc->a10_dev, "DMA status %d\n", sc->a10_use_dma) ;
 #endif
@@ -275,7 +277,7 @@
 	/* Now allocate tag and map for the buffer to be used with transfer. */
 	error = bus_dma_tag_create(bus_get_dma_tag(dev),1,
 				0,BUS_SPACE_MAXADDR_32BIT,BUS_SPACE_MAXADDR,
-				NULL,NULL,A10_DMA_BUFF_SIZE,
+				NULL,NULL,A10_DMA_MAX_SIZE,
 				A10_DMA_NSEGS,A10_DMA_BUFF_SIZE,0,
 				NULL,NULL,&sc->a10_dma_buff_tag) ;
 	if(error)
@@ -307,8 +309,11 @@
 	rem = min(len,cmd->data->len) ;
 	uint32_t error = bus_dmamap_load(sc->a10_dma_buff_tag, sc->a10_dma_buff_map,
 					cmd->data->data,rem,a10_dma_buff_cb,
-					&sc->a10_dma_buff_addr,BUS_DMA_NOWAIT) ;
-	if (error != 0)  {
+					&sc->a10_dma_buff_addr,0) ;
+	if(error == EINPROGRESS) {
+		for( ; sc->a10_dma_buff_addr == 0 ; )  { } 
+	}
+	else if (error != 0)  {
 		device_printf(sc->a10_dev, "DMA transaction failed due to insufficient resources\n") ;
 		return EIO  ;
 	}
@@ -421,10 +426,8 @@
 			break;
 		DELAY(100);
 	}
-	if (timeout == 0) {
-		device_printf(sc->a10_dev, "Getting timedout in reset\n") ;
+	if (timeout == 0)
 		return (ETIMEDOUT);
-	}
 
 	/* Set the timeout. */
 	A10_MMC_WRITE_4(sc, A10_MMC_TIMEOUT, 0xffffffff);
@@ -468,6 +471,7 @@
 	sc->a10_resid = 0;
 	sc->a10_idst = 0 ;
 	sc->a10_intr_wait = 0;
+	sc->a10_dma_buff_addr = 0 ; 
 	req->done(req);
 }
 
@@ -576,7 +580,6 @@
 	if (rint & A10_MMC_INT_ERR_BIT) {
 		device_printf(sc->a10_dev, "error rint: 0x%08X\n", rint);
 		if (rint & A10_MMC_RESP_TIMEOUT) {
-			device_printf(sc->a10_dev,"Setting timeout in intr\n") ;
 			sc->a10_req->cmd->error = MMC_ERR_TIMEOUT;
 		}
 		else
@@ -595,7 +598,7 @@
 	}
 
 	if(idst & A10_MMC_IDMAC_COMPLETE) {
-		device_printf(sc->a10_dev, "DMA transfer complete!\n") ;
+		//device_printf(sc->a10_dev, "DMA transfer complete!\n") ;
 		if(sc->a10_dma_ops == 0)
 			bus_dmamap_sync(sc->a10_dma_tag, sc->a10_dma_map, BUS_DMASYNC_POSTREAD) ;
 		else if(sc->a10_dma_ops == 1)
@@ -619,7 +622,6 @@
 	sc->a10_intr |= rint;
 	data = sc->a10_req->cmd->data;
 
-	//device_printf(sc->a10_dev, "Data is %p\n", data) ;
 	if (data != NULL && (rint & (A10_MMC_DATA_OVER |
 	    A10_MMC_RX_DATA_REQ | A10_MMC_TX_DATA_REQ)) != 0)
 			a10_mmc_pio_transfer(sc, data);

Modified: soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_mmc.h
==============================================================================
--- soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_mmc.h	Wed Jun 17 11:48:00 2015	(r287235)
+++ soc2015/pratiksinghal/cubie-head/sys/arm/allwinner/a10_mmc.h	Wed Jun 17 12:49:18 2015	(r287236)
@@ -66,7 +66,7 @@
 #define	A10_MMC_DMA_ENABLE		(1U << 5)
 #define	A10_MMC_DEBOUNCE_ENABLE		(1U << 8)
 #define	A10_MMC_DDR_MODE		(1U << 10)
-#define	A10_MMC_ACCESS_BY_DMA		(0U << 31) /*Change from previous value of 1U << 30, source : linux-sunxi*/ 
+#define	A10_MMC_ACCESS_BY_DMA		(0U << 31)
 #define	A10_MMC_ACCESS_BY_AHB		(1U << 31)
 #define	A10_MMC_RESET					\
 	(A10_MMC_SOFT_RESET | A10_MMC_FIFO_RESET | A10_MMC_DMA_RESET)
@@ -177,29 +177,29 @@
 #define	A10_MMC_IDMAC_DESC_CLOSE	(8U << 13)
 #define A10_MMC_IDMAC_ERROR \
 	(A10_MMC_IDMAC_FATAL_BUS_ERR | A10_MMC_IDMAC_CARD_ERR_SUM | A10_MMC_IDMAC_DES_INVALID | \
-	A10_MMC_IDMAC_ABNORMAL_INT_SUM) 
+	A10_MMC_IDMAC_ABNORMAL_INT_SUM)
 #define A10_MMC_IDMAC_COMPLETE \
-	(A10_MMC_IDMAC_TRANSMIT_INT | A10_MMC_IDMAC_RECEIVE_INT) 
+	(A10_MMC_IDMAC_TRANSMIT_INT | A10_MMC_IDMAC_RECEIVE_INT)
 
-/* Used to make the descriptor table for suppoting DMA Access */ 
-struct a10_mmc_dma_desc { 
-	uint32_t config ; 
-#define A10_MMC_DMA_CONFIG_DIC (1U << 1) 
-#define A10_MMC_DMA_CONFIG_LD  (1U << 2) 
-#define A10_MMC_DMA_CONFIG_FD  (1U << 3) 
+/* Used to make the descriptor table for suppoting DMA Access */
+struct a10_mmc_dma_desc {
+	uint32_t config ;
+#define A10_MMC_DMA_CONFIG_DIC (1U << 1)
+#define A10_MMC_DMA_CONFIG_LD  (1U << 2)
+#define A10_MMC_DMA_CONFIG_FD  (1U << 3)
 #define A10_MMC_DMA_CONFIG_CH  (1U << 4)
-#define A10_MMC_DMA_CONFIG_ER  (1U << 5) 
-#define A10_MMC_DMA_CONFIG_CES (1U << 30) 
-#define A10_MMC_DMA_CONFIG_OWN (1U << 31) 
-	uint32_t buff_size ; 
-	uint32_t buff_addr ; 
-	uint32_t next; 
-} ; 
+#define A10_MMC_DMA_CONFIG_ER  (1U << 5)
+#define A10_MMC_DMA_CONFIG_CES (1U << 30)
+#define A10_MMC_DMA_CONFIG_OWN (1U << 31)
+	uint32_t buff_size ;
+	uint32_t buff_addr ;
+	uint32_t next;
+} ;
 
 struct a10_mmc_cb
 {
-	bus_addr_t addr ; 
-	bus_dma_segment_t* segs ; 
-} ; 
+	bus_addr_t addr ;
+	bus_dma_segment_t* segs ;
+} ;
 
 #endif /* _A10_MMC_H_ */



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