Date: Fri, 28 Jun 2013 22:31:17 +0000 (UTC) From: Aleksandr Rybalko <ray@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r252361 - in head/sys/arm: arm include Message-ID: <201306282231.r5SMVHvb023602@svn.freebsd.org>
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Author: ray Date: Fri Jun 28 22:31:17 2013 New Revision: 252361 URL: http://svnweb.freebsd.org/changeset/base/252361 Log: Add identification for Cortex-A15 (R0) cores. Submitted by: Ruslan Bukin <br@bsdpad.com> Modified: head/sys/arm/arm/cpufunc.c head/sys/arm/arm/identcpu.c head/sys/arm/include/armreg.h Modified: head/sys/arm/arm/cpufunc.c ============================================================================== --- head/sys/arm/arm/cpufunc.c Fri Jun 28 22:25:37 2013 (r252360) +++ head/sys/arm/arm/cpufunc.c Fri Jun 28 22:31:17 2013 (r252361) @@ -1481,7 +1481,8 @@ set_cpufuncs() cputype == CPU_ID_CORTEXA8R3 || cputype == CPU_ID_CORTEXA9R1 || cputype == CPU_ID_CORTEXA9R2 || - cputype == CPU_ID_CORTEXA9R3) { + cputype == CPU_ID_CORTEXA9R3 || + cputype == CPU_ID_CORTEXA15 ) { cpufuncs = cortexa_cpufuncs; cpu_reset_needs_v4_MMU_disable = 1; /* V4 or higher */ get_cachetype_cp15(); Modified: head/sys/arm/arm/identcpu.c ============================================================================== --- head/sys/arm/arm/identcpu.c Fri Jun 28 22:25:37 2013 (r252360) +++ head/sys/arm/arm/identcpu.c Fri Jun 28 22:31:17 2013 (r252361) @@ -248,6 +248,8 @@ const struct cpuidtab cpuids[] = { generic_steppings }, { CPU_ID_CORTEXA9R3, CPU_CLASS_CORTEXA, "Cortex A9-r3", generic_steppings }, + { CPU_ID_CORTEXA15, CPU_CLASS_CORTEXA, "Cortex A15", + generic_steppings }, { CPU_ID_SA110, CPU_CLASS_SA1, "SA-110", sa110_steppings }, Modified: head/sys/arm/include/armreg.h ============================================================================== --- head/sys/arm/include/armreg.h Fri Jun 28 22:25:37 2013 (r252360) +++ head/sys/arm/include/armreg.h Fri Jun 28 22:31:17 2013 (r252361) @@ -153,6 +153,7 @@ #define CPU_ID_CORTEXA9R1 0x411fc090 #define CPU_ID_CORTEXA9R2 0x412fc090 #define CPU_ID_CORTEXA9R3 0x413fc090 +#define CPU_ID_CORTEXA15 0x410fc0f0 #define CPU_ID_SA110 0x4401a100 #define CPU_ID_SA1100 0x4401a110 #define CPU_ID_TI925T 0x54029250
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