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Date:      Thu, 2 Jan 1997 11:30:54 +1030 (CST)
From:      Michael Smith <msmith@atrad.adelaide.edu.au>
To:        hmmm@alaska.net (hmmm)
Cc:        hackers@FreeBSD.ORG
Subject:   Re: Ints (fwd)
Message-ID:  <199701020100.LAA14579@genesis.atrad.adelaide.edu.au>
In-Reply-To: <Pine.GSO.3.93.961231123017.8358B-100000@calvino.alaska.net> from hmmm at "Dec 31, 96 12:30:41 pm"

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hmmm stands accused of saying:
>
> Wait a second guys.... The interrupt lines on the ISA bus are
> open-collector, which means that it is possible to OR-TIE them
> together- remember Digital Electronics Fundamentals?  Open-collector
> is very similar to tri-state, and is used when there is only 1
> active state.  If an application should require multiple devices to
> share a bus, and 2 active states are required, then tri-state
> drivers are required on all outputs.

... only ISA interrupt lines aren't open-collector.  The RC time
constant implicit in OC circuits (there is a tradeoff between the
risetime and the power dissipation in the driving circuit) is
unacceptable for anything other than the slowest logic.

Work it out; 5V / 24mA (LSTTL sink limit) = ~200R.  Assuming 50pf of
parasitic capacitance (not unreasonable), you get RC = 10usec.  Not so
good.  (220R is actually the accepted value for LSTTL and compatible
families, witness the 220/330R resistor pairing in passive SCSI
terminators.)

Just about every other multi-card bus ever invented uses daisy-chained
interrupts or slot interrupts or some other manifestation of a sensible
scheme.  But not ISA.  YOU CANNOT SHARE INTERRUPTS SAFELY ON ISA.

> The only state which we are concerned with is ACTIVE (low).  The
> processor doesn't care if an interrupt isn't happening, only when
> one IS.  So a peripheral device does not DRIVE the interrupt line
> "the other way", it simply de-activates it's open-collector output.
> If another peripheral device happens to have interrupt asserted, the
> state of the IRQ line will not change.

... but the inputs to the 8259 are _edge_triggered_.  If another
device is holding the line asserted, that doesn't count for a new
interrupt.  It also means that another edge can't occur.  So not only
is the second interrupt lost, but every interrupt after that is lost
as well.

Personally, I find the fact that PC's work at all to be quite amazing.

-- 
]] Mike Smith, Software Engineer        msmith@gsoft.com.au             [[
]] Genesis Software                     genesis@gsoft.com.au            [[
]] High-speed data acquisition and      (GSM mobile)     0411-222-496   [[
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]] Unix hardware collector.             "Where are your PEZ?" The Tick  [[



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