Date: Fri, 14 May 2010 12:13:42 -0400 From: Alexander Sack <pisymbol@gmail.com> To: Andrew Gallatin <gallatin@cs.duke.edu> Cc: Murat Balaban <murat@enderunix.org>, freebsd-net@freebsd.org, freebsd-performance@freebsd.org Subject: Re: Intel 10Gb Message-ID: <AANLkTim9y9B7kW4OH74LLa2Iwffkvu1rYoSODGYvRMwy@mail.gmail.com> In-Reply-To: <4BED6F1B.7070602@cs.duke.edu> References: <AANLkTimMrsM08Rmdr-l6RFu83VkqFw0Pk2sHxpV5Yl5x@mail.gmail.com> <4BE52856.3000601@unsane.co.uk> <1273323582.3304.31.camel@efe> <20100511135103.GA29403@grapeape2.cs.duke.edu> <AANLkTikROvNKUmpax-CbhEyj5o7TW0hfV_x79Bm_nU2V@mail.gmail.com> <4BED5929.5020302@cs.duke.edu> <AANLkTikAow9ZdK4XokeWXkbmusva2rKxeLO2EBBe3tsZ@mail.gmail.com> <4BED6F1B.7070602@cs.duke.edu>
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On Fri, May 14, 2010 at 11:41 AM, Andrew Gallatin <gallatin@cs.duke.edu> wr= ote: > Alexander Sack wrote: >> On Fri, May 14, 2010 at 10:07 AM, Andrew Gallatin <gallatin@cs.duke.edu> >> wrote: >>> Alexander Sack wrote: >>> <...> >>>>> Using this driver/firmware combo, we can receive minimal packets at >>>>> line rate (14.8Mpps) to userspace. =A0You can even access this using = a >>>>> libpcap interface. =A0The trick is that the fast paths are OS-bypass, >>>>> and don't suffer from OS overheads, like lock contention. =A0See >>>>> http://www.myri.com/scs/SNF/doc/index.html for details. >>>> But your timestamps will be atrocious at 10G speeds. =A0Myricom doesn'= t >>>> timestamp packets AFAIK. =A0If you want reliable timestamps you need t= o >>>> look at companies like Endace, Napatech, etc. >>> I see your old help ticket in our system. =A0Yes, our timestamping >>> is not as good as a dedicated capture card with a GPS reference, >>> but it is good enough for most people. >> >> I was told btw that it doesn't timestamp at ALL. =A0I am assuming NOW >> that is incorrect. > > I think you might have misunderstood how we do timestamping. > I definately don't understand it, and I work there ;) No problem. :) > I do know that there is NIC component of it (eg, it is not 100% > done in the host). =A0I also realize that it is not is good as > something that is 1PPS GPS based. I need to grab your docs and start reading it again. I would like to support data capture using the Myricom card. I somehow missed this. I had thought the timestamps were software generated only. > >> Define *most* people. > > I may have a skewed view of the market, but it seems like > some people care deeply about accurate timestamps, and > others (mostly doing deep packet inspection) care only > within a few milliseconds, or even seconds. In our case Andrew, the folks who are doing deep packet inspection REQUIRE reasonable time stamps to correlate events and do generate reasonable stats. But I hear you, if you are just looking to see the packet data, then timestamp accuracy isn't your top priority. >> Question for Jack or Drew, what DOES FreeBSD have to do to support >> DCA? =A0I thought DCA was something you just enable on the NIC chipset >> and if the system is IOATDMA aware, it just works. =A0Is that not right >> (assuming cache tags are correct and accessible)? =A0i.e. I thought this >> was hardware black magic than anything specific the OS has to do. > > IOATDMA and DCA are sort of unfairly joined for two reasons: The DCA > control stuff is implemented as part of the IOATDMA PCIe device, and > IOATDMA is a great usage model for DCA, since you'd want the DMAs > that it does to be prefetched. > > To use DCA you need: > > - A DCA driver to talk to the IOATDMA/DCA pcie device, and obtain the tag > =A0 =A0 =A0 =A0table > - An interface that a client device (eg, NIC driver) can use to obtain > =A0 =A0 =A0 =A0either the tag table, or at least the correct tag for the = CPU > =A0 =A0 =A0 =A0that the interrupt handler is bound to. =A0The basic suppo= rt in > =A0 =A0 =A0 =A0a NIC driver boils down to something like: > > nic_interrupt_handler() > { > =A0if (sc->dca.enabled && (curcpu !=3D sc->dca.last_cpu)) { > =A0 =A0 sc->dca.last_cpu =3D curcpu; > =A0 =A0 tag =3D dca_get_tag(curcpu); > =A0 =A0 WRITE_REG(sc, DCA_TAG, tag); > =A0} > } Drew, at least in the Intel documentation, it seems the NIC uses the LAPIC id to tell the PCIe TLPs where to put inbound NIC I/O (in the TLP the DCA info is stored) to the appropriate core's cache. i.e. the heuristic you gave above is more granular than what I think Intel does. I could be wrong, maybe Jack can chime in and correct me. But it seems with Intel chipsets it is a per queue parameter which allows you to bind a core cache's to a queue via DCA. The added piece to this for at least bpf(4) consumers is to have bpf(4) subscribe to these queues AND to allow an interface for libpcap applications to know where what queue is on what core and THEN bind to it. I think that is the general idea....I think! :) -aps
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