Date: Wed, 22 May 2013 21:52:59 +0000 (UTC) From: Brooks Davis <brooks@FreeBSD.org> To: ports-committers@freebsd.org, svn-ports-all@freebsd.org, svn-ports-head@freebsd.org Subject: svn commit: r318798 - in head/devel/llvm: . files Message-ID: <201305222152.r4MLqxWu083516@svn.freebsd.org>
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Author: brooks Date: Wed May 22 21:52:59 2013 New Revision: 318798 URL: http://svnweb.freebsd.org/changeset/ports/318798 Log: Apply several upstream svn revisions that have also been merged to the base version: r170353: Fix another SROA crasher, PR14601. This was a silly oversight, we weren't pruning allocas which were used by variable-length memory intrinsics from the set that could be widened and promoted as integers. Fix that. r175057: X86: Disable generation of rep;movsl when %esi is used as a base pointer. This happens when there is both stack realignment and a dynamic alloca in the function. If we overwrite %esi (rep;movsl uses fixed registers) we'll lose the base pointer and the next register spill will write into oblivion. Fixes PR15249 and unbreaks firefox on i386/freebsd. Mozilla uses dynamic allocas and freebsd a 4 byte stack alignment. r175360: MCParser: Reject .balign with non-pow2 alignments. GNU as rejects them and there are configure scripts in the wild that check if the assembler rejects ".align 3" to determine whether the alignment is in bytes or powers of two. r175962: X86: Disable cmov-memory patterns on subtargets without cmov. PR: ports/176269, ports/176893, ports/176967 Requested by: tijl, dim, others Added: head/devel/llvm/files/patch-svn-r170353 (contents, props changed) head/devel/llvm/files/patch-svn-r175057 (contents, props changed) head/devel/llvm/files/patch-svn-r175360 (contents, props changed) head/devel/llvm/files/patch-svn-r175962 (contents, props changed) Modified: head/devel/llvm/Makefile Modified: head/devel/llvm/Makefile ============================================================================== --- head/devel/llvm/Makefile Wed May 22 21:47:40 2013 (r318797) +++ head/devel/llvm/Makefile Wed May 22 21:52:59 2013 (r318798) @@ -7,7 +7,7 @@ PORTNAME= llvm PORTVERSION= 3.2 -PORTREVISION= 1 +PORTREVISION= 2 CATEGORIES= devel lang MASTER_SITES= http://llvm.org/releases/${PORTVERSION}/ DISTNAME= ${PORTNAME}-${PORTVERSION}.src @@ -23,7 +23,7 @@ BUILD_DEPENDS+= bash:${PORTSDIR}/shells/ BUILD_DEPENDS+= f2c:${PORTSDIR}/lang/f2c .endif -CONFLICTS= llvm-devel-[23]* llvm29-* llvm31-* +CONFLICTS= llvm-devel-[23]* llvm31-3* GNU_CONFIGURE= yes USE_GMAKE= yes @@ -165,4 +165,16 @@ build-plist: ${SED} -e 's|${DOCSDIR}|%%DOCSDIR%%|' \ -e 's|^|%%PORTDOCS%%@dirrm |' >> ${PLIST} +.if make(svn-patch) +.if !defined(PATCH_REV) +.error svn-patch requires that PATCH_REV be set +.endif +_PATCH_FILE=${FILESDIR}/patch-svn-${PATCH_REV} +_LLVM_BASE=http://llvm.org/svn/llvm-project/llvm/trunk +svn-patch: + printf "$$%s$$\n" FreeBSD > ${_PATCH_FILE} + svn log -c ${PATCH_REV} ${_LLVM_BASE} >> ${_PATCH_FILE} + svn diff -c ${PATCH_REV} ${_LLVM_BASE} >> ${_PATCH_FILE} +.endif + .include <bsd.port.post.mk> Added: head/devel/llvm/files/patch-svn-r170353 ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/devel/llvm/files/patch-svn-r170353 Wed May 22 21:52:59 2013 (r318798) @@ -0,0 +1,46 @@ +$FreeBSD$ +------------------------------------------------------------------------ +r170353 | chandlerc | 2012-12-17 18:48:07 +0000 (Mon, 17 Dec 2012) | 5 lines + +Fix another SROA crasher, PR14601. + +This was a silly oversight, we weren't pruning allocas which were used +by variable-length memory intrinsics from the set that could be widened +and promoted as integers. Fix that. +------------------------------------------------------------------------ +Index: lib/Transforms/Scalar/SROA.cpp +=================================================================== +--- lib/Transforms/Scalar/SROA.cpp (revision 170352) ++++ lib/Transforms/Scalar/SROA.cpp (revision 170353) +@@ -2150,7 +2150,7 @@ + !canConvertValue(TD, ValueTy, AllocaTy)) + return false; + } else if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(I->U->getUser())) { +- if (MI->isVolatile()) ++ if (MI->isVolatile() || !isa<Constant>(MI->getLength())) + return false; + if (MemTransferInst *MTI = dyn_cast<MemTransferInst>(I->U->getUser())) { + const AllocaPartitioning::MemTransferOffsets &MTO +Index: test/Transforms/SROA/basictest.ll +=================================================================== +--- test/Transforms/SROA/basictest.ll (revision 170352) ++++ test/Transforms/SROA/basictest.ll (revision 170353) +@@ -1208,3 +1208,18 @@ + ret i32 %y + ; CHECK: ret i32 + } ++ ++define i32 @PR14601(i32 %x) { ++; Don't try to form a promotable integer alloca when there is a variable length ++; memory intrinsic. ++; CHECK: @PR14601 ++ ++entry: ++ %a = alloca i32 ++; CHECK: alloca ++ ++ %a.i8 = bitcast i32* %a to i8* ++ call void @llvm.memset.p0i8.i32(i8* %a.i8, i8 0, i32 %x, i32 1, i1 false) ++ %v = load i32* %a ++ ret i32 %v ++} Added: head/devel/llvm/files/patch-svn-r175057 ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/devel/llvm/files/patch-svn-r175057 Wed May 22 21:52:59 2013 (r318798) @@ -0,0 +1,55 @@ +$FreeBSD$ +------------------------------------------------------------------------ +r175057 | d0k | 2013-02-13 13:40:35 +0000 (Wed, 13 Feb 2013) | 8 lines + +X86: Disable generation of rep;movsl when %esi is used as a base pointer. + +This happens when there is both stack realignment and a dynamic alloca in the +function. If we overwrite %esi (rep;movsl uses fixed registers) we'll lose the +base pointer and the next register spill will write into oblivion. + +Fixes PR15249 and unbreaks firefox on i386/freebsd. Mozilla uses dynamic allocas +and freebsd a 4 byte stack alignment. +------------------------------------------------------------------------ +Index: lib/Target/X86/X86SelectionDAGInfo.cpp +=================================================================== +--- lib/Target/X86/X86SelectionDAGInfo.cpp (revision 175056) ++++ lib/Target/X86/X86SelectionDAGInfo.cpp (revision 175057) +@@ -202,6 +202,14 @@ + SrcPtrInfo.getAddrSpace() >= 256) + return SDValue(); + ++ // ESI might be used as a base pointer, in that case we can't simply overwrite ++ // the register. Fall back to generic code. ++ const X86RegisterInfo *TRI = ++ static_cast<const X86RegisterInfo *>(DAG.getTarget().getRegisterInfo()); ++ if (TRI->hasBasePointer(DAG.getMachineFunction()) && ++ TRI->getBaseRegister() == X86::ESI) ++ return SDValue(); ++ + MVT AVT; + if (Align & 1) + AVT = MVT::i8; +Index: test/CodeGen/X86/stack-align-memcpy.ll +=================================================================== +--- test/CodeGen/X86/stack-align-memcpy.ll (revision 0) ++++ test/CodeGen/X86/stack-align-memcpy.ll (revision 175057) +@@ -0,0 +1,18 @@ ++; RUN: llc < %s -force-align-stack -mtriple i386-apple-darwin -mcpu=i486 | FileCheck %s ++ ++%struct.foo = type { [88 x i8] } ++ ++; PR15249 ++; We can't use rep;movsl here because it clobbers the base pointer in %esi. ++define void @test1(%struct.foo* nocapture %x, i32 %y) nounwind { ++ %dynalloc = alloca i8, i32 %y, align 1 ++ call void @bar(i8* %dynalloc, %struct.foo* align 4 byval %x) ++ ret void ++ ++; CHECK: test1: ++; CHECK: andl $-16, %esp ++; CHECK: movl %esp, %esi ++; CHECK-NOT: rep;movsl ++} ++ ++declare void @bar(i8* nocapture, %struct.foo* align 4 byval) nounwind Added: head/devel/llvm/files/patch-svn-r175360 ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/devel/llvm/files/patch-svn-r175360 Wed May 22 21:52:59 2013 (r318798) @@ -0,0 +1,40 @@ +$FreeBSD$ +------------------------------------------------------------------------ +r175360 | d0k | 2013-02-16 15:00:16 +0000 (Sat, 16 Feb 2013) | 5 lines + +MCParser: Reject .balign with non-pow2 alignments. + +GNU as rejects them and there are configure scripts in the wild that check if +the assembler rejects ".align 3" to determine whether the alignment is in bytes +or powers of two. +------------------------------------------------------------------------ +Index: lib/MC/MCParser/AsmParser.cpp +=================================================================== +--- lib/MC/MCParser/AsmParser.cpp (revision 175359) ++++ lib/MC/MCParser/AsmParser.cpp (revision 175360) +@@ -2456,6 +2456,10 @@ + } + + Alignment = 1ULL << Alignment; ++ } else { ++ // Reject alignments that aren't a power of two, for gas compatibility. ++ if (!isPowerOf2_64(Alignment)) ++ Error(AlignmentLoc, "alignment must be a power of 2"); + } + + // Diagnose non-sensical max bytes to align. +Index: test/MC/AsmParser/align_invalid.s +=================================================================== +--- test/MC/AsmParser/align_invalid.s (revision 0) ++++ test/MC/AsmParser/align_invalid.s (revision 175360) +@@ -0,0 +1,10 @@ ++# RUN: llvm-mc -triple i386-linux-gnu < %s 2>&1 | FileCheck %s -check-prefix=ELF ++# RUN: llvm-mc -triple i386-apple-darwin < %s 2>&1 | FileCheck %s -check-prefix=DARWIN ++ ++.align 3 ++# ELF: error: alignment must be a power of 2 ++# DARWIN-NOT: error ++ ++.align 32 ++# ELF-NOT: error ++# DARWIN: error: invalid alignment value Added: head/devel/llvm/files/patch-svn-r175962 ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/devel/llvm/files/patch-svn-r175962 Wed May 22 21:52:59 2013 (r318798) @@ -0,0 +1,49 @@ +$FreeBSD$ +------------------------------------------------------------------------ +r175962 | d0k | 2013-02-23 10:40:58 +0000 (Sat, 23 Feb 2013) | 3 lines + +X86: Disable cmov-memory patterns on subtargets without cmov. + +Fixes PR15115. +------------------------------------------------------------------------ +Index: test/CodeGen/X86/no-cmov.ll +=================================================================== +--- test/CodeGen/X86/no-cmov.ll (revision 0) ++++ test/CodeGen/X86/no-cmov.ll (revision 175962) +@@ -0,0 +1,11 @@ ++; RUN: llc -march=x86 -mcpu=i486 < %s | FileCheck %s ++ ++define i32 @test1(i32 %g, i32* %j) { ++ %tobool = icmp eq i32 %g, 0 ++ %cmp = load i32* %j, align 4 ++ %retval.0 = select i1 %tobool, i32 1, i32 %cmp ++ ret i32 %retval.0 ++ ++; CHECK: test1: ++; CHECK-NOT: cmov ++} +Index: lib/Target/X86/X86InstrCompiler.td +=================================================================== +--- lib/Target/X86/X86InstrCompiler.td (revision 175961) ++++ lib/Target/X86/X86InstrCompiler.td (revision 175962) +@@ -1081,12 +1081,14 @@ + // inverted. + multiclass CMOVmr<PatLeaf InvertedCond, Instruction Inst16, Instruction Inst32, + Instruction Inst64> { +- def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, InvertedCond, EFLAGS), +- (Inst16 GR16:$src2, addr:$src1)>; +- def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, InvertedCond, EFLAGS), +- (Inst32 GR32:$src2, addr:$src1)>; +- def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, InvertedCond, EFLAGS), +- (Inst64 GR64:$src2, addr:$src1)>; ++ let Predicates = [HasCMov] in { ++ def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, InvertedCond, EFLAGS), ++ (Inst16 GR16:$src2, addr:$src1)>; ++ def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, InvertedCond, EFLAGS), ++ (Inst32 GR32:$src2, addr:$src1)>; ++ def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, InvertedCond, EFLAGS), ++ (Inst64 GR64:$src2, addr:$src1)>; ++ } + } + + defm : CMOVmr<X86_COND_B , CMOVAE16rm, CMOVAE32rm, CMOVAE64rm>;
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