Date: Fri, 5 Aug 2016 14:07:40 GMT From: vincenzo@FreeBSD.org To: svn-soc-all@FreeBSD.org Subject: socsvn commit: r307234 - soc2016/vincenzo/head/usr.sbin/bhyve Message-ID: <201608051407.u75E7ea7002916@socsvn.freebsd.org>
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Author: vincenzo Date: Fri Aug 5 14:07:39 2016 New Revision: 307234 URL: http://svnweb.FreeBSD.org/socsvn/?view=rev&rev=307234 Log: bhyve: ptnet: redirect PCI read/write to the MSI-X emulation code Modified: soc2016/vincenzo/head/usr.sbin/bhyve/pci_ptnetmap_netif.c Modified: soc2016/vincenzo/head/usr.sbin/bhyve/pci_ptnetmap_netif.c ============================================================================== --- soc2016/vincenzo/head/usr.sbin/bhyve/pci_ptnetmap_netif.c Fri Aug 5 14:07:02 2016 (r307233) +++ soc2016/vincenzo/head/usr.sbin/bhyve/pci_ptnetmap_netif.c Fri Aug 5 14:07:39 2016 (r307234) @@ -195,39 +195,6 @@ sc->ioregs[PTNET_IO_PTSTS >> 2] = ret; } -static uint64_t -ptnet_bar_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, - int baridx, uint64_t offset, int size) -{ - struct ptnet_softc *sc = pi->pi_arg; - - if (sc == NULL) - return 0; - - offset &= PTNET_IO_MASK; - - if (baridx == PTNETMAP_IO_PCI_BAR && offset < PTNET_IO_END) { - switch (offset) { - case PTNET_IO_NIFP_OFS: - case PTNET_IO_NUM_TX_RINGS: - case PTNET_IO_NUM_RX_RINGS: - case PTNET_IO_NUM_TX_SLOTS: - case PTNET_IO_NUM_RX_SLOTS: - /* Fill in device registers with information about - * nifp_offset, num_*x_rings, and num_*x_slots. */ - ptnet_get_netmap_if(sc); - - default: - return sc->ioregs[offset >> 2]; - } - } - - fprintf(stderr, "%s: Unexpected register read [bar %u, offset %lx " - "size %d]\n", __func__, baridx, offset, size); - - return 0; -} - static void ptnet_csb_mapping(struct ptnet_softc *sc) { @@ -248,6 +215,13 @@ struct ptnet_softc *sc = pi->pi_arg; unsigned int index; + /* Redirect to MSI-X emulation code. */ + if (baridx == pci_msix_table_bar(pi) || + baridx == pci_msix_pba_bar(pi)) { + pci_emul_msix_twrite(pi, offset, size, value); + return; + } + if (sc == NULL) return; @@ -290,6 +264,44 @@ "size %d value %lx]\n", __func__, baridx, offset, size, value); } +static uint64_t +ptnet_bar_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, + int baridx, uint64_t offset, int size) +{ + struct ptnet_softc *sc = pi->pi_arg; + + if (baridx == pci_msix_table_bar(pi) || + baridx == pci_msix_pba_bar(pi)) { + return pci_emul_msix_tread(pi, offset, size); + } + + if (sc == NULL) + return 0; + + offset &= PTNET_IO_MASK; + + if (baridx == PTNETMAP_IO_PCI_BAR && offset < PTNET_IO_END) { + switch (offset) { + case PTNET_IO_NIFP_OFS: + case PTNET_IO_NUM_TX_RINGS: + case PTNET_IO_NUM_RX_RINGS: + case PTNET_IO_NUM_TX_SLOTS: + case PTNET_IO_NUM_RX_SLOTS: + /* Fill in device registers with information about + * nifp_offset, num_*x_rings, and num_*x_slots. */ + ptnet_get_netmap_if(sc); + + default: + return sc->ioregs[offset >> 2]; + } + } + + fprintf(stderr, "%s: Unexpected register read [bar %u, offset %lx " + "size %d]\n", __func__, baridx, offset, size); + + return 0; +} + /* PCI device initialization. */ static int ptnet_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
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