Date: Wed, 14 Aug 2013 20:30:07 GMT From: syuu@FreeBSD.org To: svn-soc-all@FreeBSD.org Subject: socsvn commit: r255942 - soc2013/syuu/bhyve_usb/usr.sbin/bhyve/usb Message-ID: <201308142030.r7EKU7Xo004578@socsvn.freebsd.org>
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Author: syuu Date: Wed Aug 14 20:30:06 2013 New Revision: 255942 URL: http://svnweb.FreeBSD.org/socsvn/?view=rev&rev=255942 Log: implement pci_dma_read/pci_dma_write Modified: soc2013/syuu/bhyve_usb/usr.sbin/bhyve/usb/hcd-uhci.c Modified: soc2013/syuu/bhyve_usb/usr.sbin/bhyve/usb/hcd-uhci.c ============================================================================== --- soc2013/syuu/bhyve_usb/usr.sbin/bhyve/usb/hcd-uhci.c Wed Aug 14 19:34:13 2013 (r255941) +++ soc2013/syuu/bhyve_usb/usr.sbin/bhyve/usb/hcd-uhci.c Wed Aug 14 20:30:06 2013 (r255942) @@ -35,6 +35,7 @@ #include <signal.h> #include "pci_emul.h" +#include "bhyverun.h" #include "hw/usb.h" #define le32_to_cpus(x) le32toh(x) @@ -45,6 +46,7 @@ #define PCI_VENDOR_ID_INTEL 0x8086 #define PCI_DEVICE_ID_INTEL_82801I_UHCI6 0x2939 +#if 0 struct PCIDevice { uint8_t *config; }; @@ -55,6 +57,7 @@ typedef struct PCIDevice PCIDevice; typedef struct PCIDeviceClass PCIDeviceClass; typedef struct MemoryRegion MemoryRegion; +#endif FILE *usblog; @@ -204,7 +207,7 @@ typedef struct UHCIAsync UHCIAsync; typedef struct UHCIQueue UHCIQueue; typedef struct UHCIInfo UHCIInfo; -typedef struct UHCIPCIDeviceClass UHCIPCIDeviceClass; +//typedef struct UHCIPCIDeviceClass UHCIPCIDeviceClass; struct UHCIInfo { const char *name; @@ -212,14 +215,16 @@ uint16_t device_id; uint8_t revision; uint8_t irq_pin; - int (*initfn)(PCIDevice *dev); +// int (*initfn)(PCIDevice *dev); bool unplug; }; +#if 0 struct UHCIPCIDeviceClass { PCIDeviceClass parent_class; UHCIInfo info; }; +#endif /* * Pending async transaction. @@ -261,9 +266,8 @@ } Timer; struct UHCIState { - struct pci_uhci_softc *sc; - PCIDevice dev; - MemoryRegion io_bar; +// PCIDevice dev; +// MemoryRegion io_bar; USBBus bus; /* Note unused when we're a companion controller */ uint16_t cmd; /* cmd register */ uint16_t status; @@ -293,6 +297,8 @@ uint32_t firstport; uint32_t maxframes; }; +#define STATE_TO_SC(state) \ + container_of((state), struct pci_uhci_softc, sc_pi) typedef struct UHCI_TD { uint32_t link; @@ -314,6 +320,7 @@ struct UHCIState sc_st; pthread_mutex_t sc_mtx; }; +#define uhci_ctx(sc) ((sc)->sc_pi->pi_vmctx) static void uhci_async_cancel(UHCIAsync *async); static void uhci_queue_fill(UHCIQueue *q, UHCI_TD *td); @@ -321,6 +328,29 @@ #define SECINNS (1000000000L) +static int pci_dma_read(struct pci_uhci_softc *sc, uintptr_t addr, void *buf, size_t len) +{ + void *haddr = paddr_guest2host(uhci_ctx(sc), addr, len); + if (!haddr) { + printf("%s failed to translate %p\n", __func__, (void *)addr); + return -1; + } + memcpy(buf, haddr, len); + return 0; +} + +static int pci_dma_write(struct pci_uhci_softc *sc, uintptr_t addr, const void *buf, size_t len) +{ + void *haddr = paddr_guest2host(uhci_ctx(sc), addr, len); + if (!haddr) { + printf("%s failed to translate %p\n", __func__, (void *)addr); + return -1; + } + memcpy(haddr, buf, len); + return 0; +} + + static int64_t timespec_to_ns(struct timespec *ts) { return ((int64_t)(ts->tv_sec * SECINNS) + ts->tv_nsec); @@ -580,9 +610,9 @@ level = 0; } if (level) - pci_lintr_assert(s->sc->sc_pi); + pci_lintr_assert(STATE_TO_SC(s)->sc_pi); else - pci_lintr_deassert(s->sc->sc_pi); + pci_lintr_deassert(STATE_TO_SC(s)->sc_pi); } static void uhci_reset(void *opaque) @@ -590,7 +620,7 @@ UHCIState *s = opaque; int i; UHCIPort *port; - struct pci_uhci_softc *sc = s->sc; + struct pci_uhci_softc *sc = STATE_TO_SC(s); trace_usb_uhci_reset(); @@ -930,7 +960,7 @@ static void uhci_read_td(UHCIState *s, UHCI_TD *td, uint32_t link) { -// pci_dma_read(&s->dev, link & ~0xf, td, sizeof(*td)); + pci_dma_read(STATE_TO_SC(s), link & ~0xf, td, sizeof(*td)); le32_to_cpus(&td->link); le32_to_cpus(&td->ctrl); le32_to_cpus(&td->token); @@ -1009,7 +1039,7 @@ *int_mask |= 0x01; if (pid == USB_TOKEN_IN) { -// pci_dma_write(&s->dev, td->buffer, async->buf, len); + pci_dma_write(STATE_TO_SC(s), td->buffer, async->buf, len); if ((td->ctrl & TD_CTRL_SPD) && len < max_len) { *int_mask |= 0x02; /* short packet: do not update QH */ @@ -1127,7 +1157,7 @@ switch(pid) { case USB_TOKEN_OUT: case USB_TOKEN_SETUP: -// pci_dma_read(&s->dev, td->buffer, async->buf, max_len); + pci_dma_read(STATE_TO_SC(s), td->buffer, async->buf, max_len); usb_handle_packet(q->ep->dev, &async->packet); if (async->packet.status == USB_RET_SUCCESS) { async->packet.actual_length = max_len; @@ -1259,7 +1289,7 @@ frame_addr = s->fl_base_addr + ((s->frnum & 0x3ff) << 2); -// pci_dma_read(&s->dev, frame_addr, &link, 4); + pci_dma_read(STATE_TO_SC(s), frame_addr, &link, 4); le32_to_cpus(&link); int_mask = 0; @@ -1297,7 +1327,7 @@ } } -// pci_dma_read(&s->dev, link & ~0xf, &qh, sizeof(qh)); + pci_dma_read(STATE_TO_SC(s), link & ~0xf, &qh, sizeof(qh)); le32_to_cpus(&qh.link); le32_to_cpus(&qh.el_link); @@ -1322,7 +1352,7 @@ if (old_td_ctrl != td.ctrl) { /* update the status bits of the TD */ val = cpu_to_le32(td.ctrl); -// pci_dma_write(&s->dev, (link & ~0xf) + 4, &val, sizeof(val)); + pci_dma_write(STATE_TO_SC(s), (link & ~0xf) + 4, &val, sizeof(val)); } switch (ret) { @@ -1350,7 +1380,7 @@ /* update QH element link */ qh.el_link = link; val = cpu_to_le32(qh.el_link); -// pci_dma_write(&s->dev, (curr_qh & ~0xf) + 4, &val, sizeof(val)); + pci_dma_write(STATE_TO_SC(s), (curr_qh & ~0xf) + 4, &val, sizeof(val)); if (!depth_first(link)) { /* done with this QH */ @@ -1727,7 +1757,6 @@ sc->sc_st.frame_timer = new_timer(uhci_frame_timer, &sc->sc_st); sc->sc_st.num_ports_vmstate = NB_PORTS; QTAILQ_INIT(&sc->sc_st.queues); - sc->sc_st.sc = sc; fprintf(usblog, "%s:%d\n", __func__, __LINE__); uhci_reset(&sc->sc_st);
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