Date: Sat, 25 Jan 2003 14:46:58 -0600 From: "Alan L. Cox" <alc@imimic.com> To: Peter Wemm <peter@wemm.org> Cc: Marcel Moolenaar <marcel@xcllnt.net>, John Baldwin <jhb@FreeBSD.org>, Nate Lawson <nate@root.org>, cvs-committers@FreeBSD.org, cvs-all@FreeBSD.org, Attila Nagy <bra@fsn.hu> Subject: Re: cvs commit: src/sys/i386/i386 identcpu.c initcpu.c locore.s Message-ID: <3E32F7C2.C251040@imimic.com> References: <20030125021907.51B482A89E@canning.wemm.org>
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Peter Wemm wrote: > > Sure, cache etc doesn't come free. But losing up to every second pipeline > slot to the "idle" spinloop because we dont ever halt the cpu in SMP mode > isn't going to help either. > I've got a P4 Xeon with a single physical CPU. I am, however, running it as though it's an SMP. On this machine, disabling idle time page zeroing also reduces the build time. Does anyone here know what needs to be done in terms of saving and restoring SSE/SSE2 state in order to use non-temporal, i.e., not-cached, stores in the idle time page zeroing code? Alan To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe cvs-all" in the body of the message
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