Date: Mon, 18 Feb 2008 05:54:24 GMT From: Warner Losh <imp@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 135629 for review Message-ID: <200802180554.m1I5sOkU051699@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=135629 Change 135629 by imp@imp_lighthouse on 2008/02/18 05:54:03 Prefer uintXX_t to u_intXX_t to make cfe_api.c happy. Affected files ... .. //depot/projects/mips2-jnpr/src/sys/mips/include/atomic.h#5 edit Differences ... ==== //depot/projects/mips2-jnpr/src/sys/mips/include/atomic.h#5 (text+ko) ==== @@ -56,20 +56,20 @@ * of interrupts and SMP safe. */ -void atomic_set_8(__volatile u_int8_t *, u_int8_t); -void atomic_clear_8(__volatile u_int8_t *, u_int8_t); -void atomic_add_8(__volatile u_int8_t *, u_int8_t); -void atomic_subtract_8(__volatile u_int8_t *, u_int8_t); +void atomic_set_8(__volatile uint8_t *, uint8_t); +void atomic_clear_8(__volatile uint8_t *, uint8_t); +void atomic_add_8(__volatile uint8_t *, uint8_t); +void atomic_subtract_8(__volatile uint8_t *, uint8_t); -void atomic_set_16(__volatile u_int16_t *, u_int16_t); -void atomic_clear_16(__volatile u_int16_t *, u_int16_t); -void atomic_add_16(__volatile u_int16_t *, u_int16_t); -void atomic_subtract_16(__volatile u_int16_t *, u_int16_t); +void atomic_set_16(__volatile uint16_t *, uint16_t); +void atomic_clear_16(__volatile uint16_t *, uint16_t); +void atomic_add_16(__volatile uint16_t *, uint16_t); +void atomic_subtract_16(__volatile uint16_t *, uint16_t); static __inline void -atomic_set_32(__volatile u_int32_t *p, u_int32_t v) +atomic_set_32(__volatile uint32_t *p, uint32_t v) { - u_int32_t temp; + uint32_t temp; __asm __volatile ( "1:\tll %0, %3\n\t" /* load old value */ @@ -83,9 +83,9 @@ } static __inline void -atomic_clear_32(__volatile u_int32_t *p, u_int32_t v) +atomic_clear_32(__volatile uint32_t *p, uint32_t v) { - u_int32_t temp; + uint32_t temp; v = ~v; __asm __volatile ( @@ -99,9 +99,9 @@ } static __inline void -atomic_add_32(__volatile u_int32_t *p, u_int32_t v) +atomic_add_32(__volatile uint32_t *p, uint32_t v) { - u_int32_t temp; + uint32_t temp; __asm __volatile ( "1:\tll %0, %3\n\t" /* load old value */ @@ -114,9 +114,9 @@ } static __inline void -atomic_subtract_32(__volatile u_int32_t *p, u_int32_t v) +atomic_subtract_32(__volatile uint32_t *p, uint32_t v) { - u_int32_t temp; + uint32_t temp; __asm __volatile ( "1:\tll %0, %3\n\t" /* load old value */ @@ -128,10 +128,10 @@ : "memory"); } -static __inline u_int32_t -atomic_readandclear_32(__volatile u_int32_t *addr) +static __inline uint32_t +atomic_readandclear_32(__volatile uint32_t *addr) { - u_int32_t result,temp; + uint32_t result,temp; __asm __volatile ( "1:\tll %0,%3\n\t" /* load current value, asserting lock */ @@ -145,10 +145,10 @@ return result; } -static __inline u_int32_t -atomic_readandset_32(__volatile u_int32_t *addr, u_int32_t value) +static __inline uint32_t +atomic_readandset_32(__volatile uint32_t *addr, uint32_t value) { - u_int32_t result,temp; + uint32_t result,temp; __asm __volatile ( "1:\tll %0,%3\n\t" /* load current value, asserting lock */ @@ -164,14 +164,14 @@ #define ATOMIC_ACQ_REL(NAME, WIDTH) \ static __inline void \ -atomic_##NAME##_acq_##WIDTH(__volatile u_int##WIDTH##_t *p, u_int##WIDTH##_t v)\ +atomic_##NAME##_acq_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\ { \ atomic_##NAME##_##WIDTH(p, v); \ mips_sync(); \ } \ \ static __inline void \ -atomic_##NAME##_rel_##WIDTH(__volatile u_int##WIDTH##_t *p, u_int##WIDTH##_t v)\ +atomic_##NAME##_rel_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\ { \ mips_sync(); \ atomic_##NAME##_##WIDTH(p, v); \ @@ -203,10 +203,10 @@ * We assume that a = b will do atomic loads and stores. */ #define ATOMIC_STORE_LOAD(WIDTH) \ -static __inline u_int##WIDTH##_t \ -atomic_load_acq_##WIDTH(__volatile u_int##WIDTH##_t *p) \ +static __inline uint##WIDTH##_t \ +atomic_load_acq_##WIDTH(__volatile uint##WIDTH##_t *p) \ { \ - u_int##WIDTH##_t v; \ + uint##WIDTH##_t v; \ \ v = *p; \ mips_sync(); \ @@ -214,7 +214,7 @@ } \ \ static __inline void \ -atomic_store_rel_##WIDTH(__volatile u_int##WIDTH##_t *p, u_int##WIDTH##_t v)\ +atomic_store_rel_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\ { \ mips_sync(); \ *p = v; \ @@ -222,8 +222,8 @@ ATOMIC_STORE_LOAD(32) ATOMIC_STORE_LOAD(64) -void atomic_store_64 (__volatile u_int64_t *, u_int64_t *); -void atomic_load_64 (__volatile u_int64_t *, u_int64_t *); +void atomic_store_64 (__volatile uint64_t *, uint64_t *); +void atomic_load_64 (__volatile uint64_t *, uint64_t *); #undef ATOMIC_STORE_LOAD @@ -232,10 +232,10 @@ * two values are equal, update the value of *p with newval. Returns * zero if the compare failed, nonzero otherwise. */ -static __inline u_int32_t -atomic_cmpset_32(__volatile u_int32_t* p, u_int32_t cmpval, u_int32_t newval) +static __inline uint32_t +atomic_cmpset_32(__volatile uint32_t* p, uint32_t cmpval, uint32_t newval) { - u_int32_t ret; + uint32_t ret; __asm __volatile ( "1:\tll %0, %4\n\t" /* load old value */ @@ -259,8 +259,8 @@ * two values are equal, update the value of *p with newval. Returns * zero if the compare failed, nonzero otherwise. */ -static __inline u_int32_t -atomic_cmpset_acq_32(__volatile u_int32_t *p, u_int32_t cmpval, u_int32_t newval) +static __inline uint32_t +atomic_cmpset_acq_32(__volatile uint32_t *p, uint32_t cmpval, uint32_t newval) { int retval; @@ -269,8 +269,8 @@ return (retval); } -static __inline u_int32_t -atomic_cmpset_rel_32(__volatile u_int32_t *p, u_int32_t cmpval, u_int32_t newval) +static __inline uint32_t +atomic_cmpset_rel_32(__volatile uint32_t *p, uint32_t cmpval, uint32_t newval) { mips_sync(); return (atomic_cmpset_32(p, cmpval, newval)); @@ -280,10 +280,10 @@ * Atomically add the value of v to the integer pointed to by p and return * the previous value of *p. */ -static __inline u_int -atomic_fetchadd_32(__volatile u_int32_t *p, u_int32_t v) +static __inline uint32_t +atomic_fetchadd_32(__volatile uint32_t *p, uint32_t v) { - u_int32_t value, temp; + uint32_t value, temp; __asm __volatile ( "1:\tll %0, %1\n\t" /* load old value */
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