Date: Tue, 31 Dec 2002 07:53:45 +0000 From: Doug Rabson <dfr@nlsystems.com> To: Marcel Moolenaar <marcel@xcllnt.net>, John Baldwin <jhb@freebsd.org> Cc: Perforce Change Reviews <perforce@freebsd.org> Subject: Re: PERFORCE change 22825 for review Message-ID: <200212310753.46078.dfr@nlsystems.com> In-Reply-To: <20021230201350.GA696@dhcp01.pn.xcllnt.net> References: <200212280132.gBS1WakY007301@repoman.freebsd.org> <XFMail.20021230144158.jhb@FreeBSD.org> <20021230201350.GA696@dhcp01.pn.xcllnt.net>
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On Monday 30 December 2002 8:13 pm, Marcel Moolenaar wrote: > On Mon, Dec 30, 2002 at 02:41:58PM -0500, John Baldwin wrote: > > > DANGER, WILL ROBINSON: this change hardcodes the trigger > > > mode and polarity for 3 interrupt vectors to be edge > > > sensitive active high. Do not use this code unless you > > > know it cannot harm. The kludge committed to get a serial > > > console on the HP box in the cluster until we have figured > > > where and how we can get information about interrupts and > > > specificly about trigger mode and polarity. > > > > How about reading the default value of the vector in the IO APIC > > vector entry? Or better yet, leave the polarity and trigger mode > > of those entries alone and only ever change the vector. > > Hmmm... Not a bad idea. But a bit scary. If the default settings are > level sensitive active low, then I'm willing to give it a shot. > > Another idea I'm playing with is to look at the bus on which the > device is attached. PCI is (AFAICT) always level sensitive active > low. No need to guess if the device is attached to a PCI bus. The > hardcoding I did is typically for devices attached to the ACPI bus. > If ACPI defaults to edge sensitive active high (=3D compatible with > ISA), then this should work. > > > However, try looking at the madt. Check out the diffs in jhb_madt > > to print out the contents of the MADT. The MADT can describe when > > certain pins are not normal. > > You mean the redirection/override entries? We don't have those. I > haven't found anything in the MADT that tells us what the polarity > and trigger mode should be. > > The override entries only apply to PIC IRQs 0-15 and this box does > not have any PICs. It does not support non-APIC interrupt schemes. > Hence, no need for overrides. > > Apparently everything is perceived to be normal from ACPI's point of > view, so there's nothing there... The type of interrupt should be stated in the MADT. Look at=20 PLATFORM_INTERRUPT_SOURCE, fields Polarity and TriggerMode. --=20 Doug Rabson=09=09=09=09Mail: dfr@nlsystems.com =09=09=09=09=09Phone: +44 20 8348 6160 To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe p4-projects" in the body of the message
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