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Date:      05 Feb 2003 10:27:20 +1100
From:      Benno Rice <benno@FreeBSD.org>
To:        Narvi <narvi@haldjas.folklore.ee>
Cc:        "Kurt J. Lidl" <lidl@pix.net>, Matthew Dillon <dillon@apollo.backplane.com>, hackers@FreeBSD.ORG
Subject:   Re: Lower power SMP boxes?
Message-ID:  <1044401240.663.2.camel@localhost>
In-Reply-To: <20030204222414.N43637-100000@haldjas.folklore.ee>
References:  <20030204222414.N43637-100000@haldjas.folklore.ee>

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On Wed, 2003-02-05 at 07:25, Narvi wrote:
> On Sat, 1 Feb 2003, Kurt J. Lidl wrote:

[snip]

> > How else are you going to do the physical interrupt steering?
> > Unless they have gone through the effort of implementing a whole
> > new and different steering mechanism -- which would fly in the face
> > of having off-the-shelf OS support from the people in Redmond, at
> > the very least.
> >
>=20
> At least at some point there was a thing called OpenPIC which the then bi=
g
> two alternative x86 processor vendors AMD and Cyrix promised to support.
> In practice I believe it ever only got used on one or two PPC boards.

One or two like every new world Macintosh. =3D)

In fact quite a lot of PowerPC boards use OpenPIC as it's specified in
the CHRP spec, which IBM and Apple follow for the most part.  I know
that Motorola's MPC10x host-pci bridge chipsets also have an
OpenPIC-compatible PIC in them.  I also wouldn't be surprised if the Mai
Logic chipset used on the Teron CX motherboards has one as well.

--=20
Benno Rice <benno@FreeBSD.org>

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