Date: Mon, 9 Dec 2013 16:46:27 -0500 From: John Baldwin <jhb@freebsd.org> To: "=?iso-8859-15?q?Jean-S=E9bastien?= =?iso-8859-15?q?_P=E9dron?=" <dumbbell@freebsd.org> Cc: svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org Subject: Re: svn commit: r258930 - head/sys/dev/drm2 Message-ID: <201312091646.27179.jhb@freebsd.org> In-Reply-To: <52A266CF.90007@FreeBSD.org> References: <201312041904.rB4J4vbM043709@svn.freebsd.org> <201312051005.23197.jhb@freebsd.org> <52A266CF.90007@FreeBSD.org>
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On Friday, December 06, 2013 7:07:43 pm Jean-S=E9bastien P=E9dron wrote: > Le 05/12/2013 16:05, John Baldwin a =E9crit : > >>> Eh, vgapci is the right place to read this. The LINK_CAP here is=20 telling > >>> you the width of the slot you are plugged into, not the width of the= =20 card > >>> that is plugged into the slot. > >> > >> I'm sorry, my knowledge of PCI is very limited (still learning) and I > >> don't understand your comment. Could you please expand on it? > > > > [explanation] >=20 > Thank you very much for the explanation! >=20 > > Can you provide pciconf -lc output from your machine >=20 > You'll find it attached. >=20 > > and tell me what you think the function should be returning (i.e. > > are you trying to determine the speed of the slot, or the speed of > > the card?) >=20 > The result of this function is used to initialize the card (ie. it does=20 > more steps if speed is 5.0). The debug message is "enabling PCIE gen 2=20 > link speeds" in this case. I admit I don't know what the code is doing=20 > exactly, so I haven't any expectation :) >=20 > What I see is that now, this part of the initialization is similar to=20 > Linux 3.8 on the same computer: in both OSes, the PCI ID of the bridge=20 > and the linkcap/linkcap2 values are logged, and the PCI ID/values are=20 > matching. Ok, after looking at the original version of this function in Linux, it does read the capabilities from the parent bridge of the slot, not from the card itself, so your change is correct. =2D-=20 John Baldwin
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