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Date:      Sun, 5 Jan 2014 22:48:12 +0000 (UTC)
From:      Alexander Motin <mav@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org
Subject:   svn commit: r260347 - stable/10/sys/dev/isp
Message-ID:  <201401052248.s05MmCUc015498@svn.freebsd.org>

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Author: mav
Date: Sun Jan  5 22:48:12 2014
New Revision: 260347
URL: http://svnweb.freebsd.org/changeset/base/260347

Log:
  MFC r257932:
  Use relaxed (write-only) memory barriers when writing some of queue index
  registers (for now on ISP2400+).  We never read those registers back and
  AFAIK their semantics does not require any immediate reaction on write.

Modified:
  stable/10/sys/dev/isp/isp_freebsd.h
  stable/10/sys/dev/isp/isp_pci.c
Directory Properties:
  stable/10/   (props changed)

Modified: stable/10/sys/dev/isp/isp_freebsd.h
==============================================================================
--- stable/10/sys/dev/isp/isp_freebsd.h	Sun Jan  5 22:47:12 2014	(r260346)
+++ stable/10/sys/dev/isp/isp_freebsd.h	Sun Jan  5 22:48:12 2014	(r260347)
@@ -459,6 +459,39 @@ default:							\
 	break;							\
 }
 
+#define	MEMORYBARRIERW(isp, type, offset, size, chan)		\
+switch (type) {							\
+case SYNC_SFORDEV:						\
+{								\
+	struct isp_fc *fc = ISP_FC_PC(isp, chan);		\
+	bus_dmamap_sync(fc->tdmat, fc->tdmap,			\
+	   BUS_DMASYNC_PREWRITE);				\
+	break;							\
+}								\
+case SYNC_REQUEST:						\
+	bus_dmamap_sync(isp->isp_osinfo.cdmat,			\
+	   isp->isp_osinfo.cdmap, BUS_DMASYNC_PREWRITE);	\
+	break;							\
+case SYNC_SFORCPU:						\
+{								\
+	struct isp_fc *fc = ISP_FC_PC(isp, chan);		\
+	bus_dmamap_sync(fc->tdmat, fc->tdmap,			\
+	   BUS_DMASYNC_POSTWRITE);				\
+	break;							\
+}								\
+case SYNC_RESULT:						\
+	bus_dmamap_sync(isp->isp_osinfo.cdmat, 			\
+	   isp->isp_osinfo.cdmap, BUS_DMASYNC_POSTWRITE);	\
+	break;							\
+case SYNC_REG:							\
+	bus_space_barrier(isp->isp_osinfo.bus_tag,		\
+	    isp->isp_osinfo.bus_handle, offset, size,		\
+	    BUS_SPACE_BARRIER_WRITE);				\
+	break;							\
+default:							\
+	break;							\
+}
+
 #define	MBOX_ACQUIRE			isp_mbox_acquire
 #define	MBOX_WAIT_COMPLETE		isp_mbox_wait_complete
 #define	MBOX_NOTIFY_COMPLETE		isp_mbox_notify_done

Modified: stable/10/sys/dev/isp/isp_pci.c
==============================================================================
--- stable/10/sys/dev/isp/isp_pci.c	Sun Jan  5 22:47:12 2014	(r260346)
+++ stable/10/sys/dev/isp/isp_pci.c	Sun Jan  5 22:48:12 2014	(r260347)
@@ -1432,6 +1432,15 @@ isp_pci_wr_reg_2400(ispsoftc_t *isp, int
 	case BIU2400_GPIOE:
 	case BIU2400_HSEMA:
 		BXW4(isp, IspVirt2Off(isp, regoff), val);
+#ifdef MEMORYBARRIERW
+		if (regoff == BIU2400_REQINP ||
+		    regoff == BIU2400_RSPOUTP ||
+		    regoff == BIU2400_PRI_REQINP ||
+		    regoff == BIU2400_ATIO_RSPOUTP)
+			MEMORYBARRIERW(isp, SYNC_REG,
+			    IspVirt2Off(isp, regoff), 4, -1)
+		else
+#endif
 		MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 4, -1);
 		break;
 	default:



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