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Date:      Wed, 7 Oct 2009 13:12:44 +0000 (UTC)
From:      Stanislav Sedov <stas@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r197832 - head/sys/dev/bge
Message-ID:  <200910071312.n97DCigb085206@svn.freebsd.org>

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Author: stas
Date: Wed Oct  7 13:12:43 2009
New Revision: 197832
URL: http://svn.freebsd.org/changeset/base/197832

Log:
  - Add support for new BGE chips (5761, 5784 and 57780).  These chips uses new
    BGE_PCI_PRODID_ASICREV register to store the chip identifier and its revision.
  - Add new grouping macro for 7575+ chips (BGE_IS_5755_PLUS).
  - Add IDs for Fujitsu-branded Broadcom adapters.
  
  PR:             kern/127587
  Tested by:      Thomas Quinot <thomas@quinot.org> (BCM7561 A0)
  MFC after:	2 weeks
  Obtained from:  OpenBSD

Modified:
  head/sys/dev/bge/if_bge.c
  head/sys/dev/bge/if_bgereg.h

Modified: head/sys/dev/bge/if_bge.c
==============================================================================
--- head/sys/dev/bge/if_bge.c	Wed Oct  7 12:38:19 2009	(r197831)
+++ head/sys/dev/bge/if_bge.c	Wed Oct  7 13:12:43 2009	(r197832)
@@ -170,6 +170,7 @@ static const struct bge_type {
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5720 },
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5721 },
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5722 },
+	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5723 },
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5750 },
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5750M },
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5751 },
@@ -184,12 +185,21 @@ static const struct bge_type {
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5754M },
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5755 },
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5755M },
+	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5761 },
+	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5761E },
+	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5761S },
+	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5761SE },
+	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5764 },
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5780 },
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5780S },
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5781 },
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5782 },
+	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5784 },
+	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5785F },
+	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5785G },
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5786 },
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5787 },
+	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5787F },
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5787M },
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5788 },
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5789 },
@@ -198,11 +208,19 @@ static const struct bge_type {
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5903M },
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5906 },
 	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM5906M },
+	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM57760 },
+	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM57780 },
+	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM57788 },
+	{ BCOM_VENDORID,	BCOM_DEVICEID_BCM57790 },
 
 	{ SK_VENDORID,		SK_DEVICEID_ALTIMA },
 
 	{ TC_VENDORID,		TC_DEVICEID_3C996 },
 
+	{ FJTSU_VENDORID,	FJTSU_DEVICEID_PW008GE4 },
+	{ FJTSU_VENDORID,	FJTSU_DEVICEID_PW008GE5 },
+	{ FJTSU_VENDORID,	FJTSU_DEVICEID_PP250450 },
+
 	{ 0, 0 }
 };
 
@@ -216,6 +234,7 @@ static const struct bge_vendor {
 	{ BCOM_VENDORID,	"Broadcom" },
 	{ SK_VENDORID,		"SysKonnect" },
 	{ TC_VENDORID,		"3Com" },
+	{ FJTSU_VENDORID,	"Fujitsu" },
 
 	{ 0, NULL }
 };
@@ -271,12 +290,18 @@ static const struct bge_revision {
 	{ BGE_CHIPID_BCM5755_A1,	"BCM5755 A1" },
 	{ BGE_CHIPID_BCM5755_A2,	"BCM5755 A2" },
 	{ BGE_CHIPID_BCM5722_A0,	"BCM5722 A0" },
+	{ BGE_CHIPID_BCM5761_A0,	"BCM5761 A0" },
+	{ BGE_CHIPID_BCM5761_A1,	"BCM5761 A1" },
+	{ BGE_CHIPID_BCM5784_A0,	"BCM5784 A0" },
+	{ BGE_CHIPID_BCM5784_A1,	"BCM5784 A1" },
 	/* 5754 and 5787 share the same ASIC ID */
 	{ BGE_CHIPID_BCM5787_A0,	"BCM5754/5787 A0" }, 
 	{ BGE_CHIPID_BCM5787_A1,	"BCM5754/5787 A1" },
 	{ BGE_CHIPID_BCM5787_A2,	"BCM5754/5787 A2" },
 	{ BGE_CHIPID_BCM5906_A1,	"BCM5906 A1" },
 	{ BGE_CHIPID_BCM5906_A2,	"BCM5906 A2" },
+	{ BGE_CHIPID_BCM57780_A0,	"BCM57780 A0" },
+	{ BGE_CHIPID_BCM57780_A1,	"BCM57780 A1" },
 
 	{ 0, NULL }
 };
@@ -297,9 +322,13 @@ static const struct bge_revision bge_maj
 	{ BGE_ASICREV_BCM5780,		"unknown BCM5780" },
 	{ BGE_ASICREV_BCM5714,		"unknown BCM5714" },
 	{ BGE_ASICREV_BCM5755,		"unknown BCM5755" },
+	{ BGE_ASICREV_BCM5761,		"unknown BCM5761" },
+	{ BGE_ASICREV_BCM5784,		"unknown BCM5784" },
+	{ BGE_ASICREV_BCM5785,		"unknown BCM5785" },
 	/* 5754 and 5787 share the same ASIC ID */
 	{ BGE_ASICREV_BCM5787,		"unknown BCM5754/5787" },
 	{ BGE_ASICREV_BCM5906,		"unknown BCM5906" },
+	{ BGE_ASICREV_BCM57780,		"unknown BCM57780" },
 
 	{ 0, NULL }
 };
@@ -309,6 +338,7 @@ static const struct bge_revision bge_maj
 #define	BGE_IS_5705_PLUS(sc)		((sc)->bge_flags & BGE_FLAG_5705_PLUS)
 #define	BGE_IS_5714_FAMILY(sc)		((sc)->bge_flags & BGE_FLAG_5714_FAMILY)
 #define	BGE_IS_575X_PLUS(sc)		((sc)->bge_flags & BGE_FLAG_575X_PLUS)
+#define	BGE_IS_5755_PLUS(sc)		((sc)->bge_flags & BGE_FLAG_5755_PLUS)
 
 const struct bge_revision * bge_lookup_rev(uint32_t);
 const struct bge_vendor * bge_lookup_vendor(uint16_t);
@@ -1758,8 +1788,7 @@ bge_blockinit(struct bge_softc *sc)
 	val = BGE_WDMAMODE_ENABLE | BGE_WDMAMODE_ALL_ATTNS;
 
 	/* Enable host coalescing bug fix. */
-	if (sc->bge_asicrev == BGE_ASICREV_BCM5755 ||
-	    sc->bge_asicrev == BGE_ASICREV_BCM5787)
+	if (BGE_IS_5755_PLUS(sc))
 		val |= 1 << 29;
 
 	/* Turn on write DMA state machine */
@@ -1768,6 +1797,12 @@ bge_blockinit(struct bge_softc *sc)
 
 	/* Turn on read DMA state machine */
 	val = BGE_RDMAMODE_ENABLE | BGE_RDMAMODE_ALL_ATTNS;
+	if (sc->bge_asicrev == BGE_ASICREV_BCM5784 ||
+	    sc->bge_asicrev == BGE_ASICREV_BCM5785 ||
+	    sc->bge_asicrev == BGE_ASICREV_BCM57780)
+		val |= BGE_RDMAMODE_BD_SBD_CRPT_ATTN |
+		    BGE_RDMAMODE_MBUF_RBD_CRPT_ATTN |
+		    BGE_RDMAMODE_MBUF_SBD_CRPT_ATTN;
 	if (sc->bge_flags & BGE_FLAG_PCIE)
 		val |= BGE_RDMAMODE_FIFO_LONG_BURST;
 	CSR_WRITE_4(sc, BGE_RDMA_MODE, val);
@@ -1790,7 +1825,10 @@ bge_blockinit(struct bge_softc *sc)
 	CSR_WRITE_4(sc, BGE_SBDC_MODE, BGE_SBDCMODE_ENABLE);
 
 	/* Turn on send data completion state machine */
-	CSR_WRITE_4(sc, BGE_SDC_MODE, BGE_SDCMODE_ENABLE);
+	val = BGE_SDCMODE_ENABLE;
+	if (sc->bge_asicrev == BGE_ASICREV_BCM5761)
+		val |= BGE_SDCMODE_CDELAY;
+	CSR_WRITE_4(sc, BGE_SDC_MODE, val);
 
 	/* Turn on send data initiator state machine */
 	CSR_WRITE_4(sc, BGE_SDI_MODE, BGE_SDIMODE_ENABLE);
@@ -1897,8 +1935,11 @@ bge_probe(device_t dev)
 			const struct bge_vendor *v;
 			uint32_t id;
 
-			id = pci_read_config(dev, BGE_PCI_MISC_CTL, 4) &
-			    BGE_PCIMISCCTL_ASICREV;
+			id = pci_read_config(dev, BGE_PCI_MISC_CTL, 4) >>
+			    BGE_PCIMISCCTL_ASICREV_SHIFT;
+			if (BGE_ASICREV(id) == BGE_ASICREV_USE_PRODID_REG)
+				id = pci_read_config(dev,
+				    BGE_PCI_PRODID_ASICREV, 4);
 			br = bge_lookup_rev(id);
 			v = bge_lookup_vendor(vid);
 			{
@@ -1915,8 +1956,8 @@ bge_probe(device_t dev)
 					    br != NULL ? br->br_name :
 					    "NetXtreme Ethernet Controller");
 			}
-			snprintf(buf, 96, "%s, %sASIC rev. %#04x", model,
-			    br != NULL ? "" : "unknown ", id >> 16);
+			snprintf(buf, 96, "%s, %sASIC rev. %#08x", model,
+			    br != NULL ? "" : "unknown ", id);
 			device_set_desc_copy(dev, buf);
 			if (pci_get_subvendor(dev) == DELL_VENDORID)
 				sc->bge_flags |= BGE_FLAG_NO_3LED;
@@ -2411,8 +2452,11 @@ bge_attach(device_t dev)
 
 	/* Save various chip information. */
 	sc->bge_chipid =
-	    pci_read_config(dev, BGE_PCI_MISC_CTL, 4) &
-	    BGE_PCIMISCCTL_ASICREV;
+	    pci_read_config(dev, BGE_PCI_MISC_CTL, 4) >>
+	    BGE_PCIMISCCTL_ASICREV_SHIFT;
+	if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_USE_PRODID_REG)
+		sc->bge_chipid = pci_read_config(dev, BGE_PCI_PRODID_ASICREV,
+		    4);
 	sc->bge_asicrev = BGE_ASICREV(sc->bge_chipid);
 	sc->bge_chiprev = BGE_CHIPREV(sc->bge_chipid);
 
@@ -2431,6 +2475,15 @@ bge_attach(device_t dev)
 
 	/* Save chipset family. */
 	switch (sc->bge_asicrev) {
+	case BGE_ASICREV_BCM5755:
+	case BGE_ASICREV_BCM5761:
+	case BGE_ASICREV_BCM5784:
+	case BGE_ASICREV_BCM5785:
+	case BGE_ASICREV_BCM5787:
+	case BGE_ASICREV_BCM57780:
+		sc->bge_flags |= BGE_FLAG_5755_PLUS | BGE_FLAG_575X_PLUS |
+		    BGE_FLAG_5705_PLUS;
+		break;
 	case BGE_ASICREV_BCM5700:
 	case BGE_ASICREV_BCM5701:
 	case BGE_ASICREV_BCM5703:
@@ -2444,8 +2497,6 @@ bge_attach(device_t dev)
 		/* FALLTHROUGH */
 	case BGE_ASICREV_BCM5750:
 	case BGE_ASICREV_BCM5752:
-	case BGE_ASICREV_BCM5755:
-	case BGE_ASICREV_BCM5787:
 	case BGE_ASICREV_BCM5906:
 		sc->bge_flags |= BGE_FLAG_575X_PLUS;
 		/* FALLTHROUGH */
@@ -2466,6 +2517,8 @@ bge_attach(device_t dev)
 	if (BGE_IS_5705_PLUS(sc) &&
 	    !(sc->bge_flags & BGE_FLAG_ADJUST_TRIM)) {
 		if (sc->bge_asicrev == BGE_ASICREV_BCM5755 ||
+		    sc->bge_asicrev == BGE_ASICREV_BCM5761 ||
+		    sc->bge_asicrev == BGE_ASICREV_BCM5784 ||
 		    sc->bge_asicrev == BGE_ASICREV_BCM5787) {
 			if (sc->bge_chipid != BGE_CHIPID_BCM5722_A0)
 				sc->bge_flags |= BGE_FLAG_JITTER_BUG;
@@ -2873,8 +2926,7 @@ bge_reset(struct bge_softc *sc)
 
 	/* Disable fastboot on controllers that support it. */
 	if (sc->bge_asicrev == BGE_ASICREV_BCM5752 ||
-	    sc->bge_asicrev == BGE_ASICREV_BCM5755 ||
-	    sc->bge_asicrev == BGE_ASICREV_BCM5787) {
+	    BGE_IS_5755_PLUS(sc)) {
 		if (bootverbose)
 			device_printf(sc->bge_dev, "Disabling fastboot\n");
 		CSR_WRITE_4(sc, BGE_FASTBOOT_PC, 0x0);
@@ -4689,6 +4741,8 @@ bge_sysctl_debug_info(SYSCTL_HANDLER_ARG
 		}
 
 		printf("Hardware Flags:\n");
+		if (BGE_IS_5755_PLUS(sc))
+			printf(" - 5755 Plus\n");
 		if (BGE_IS_575X_PLUS(sc))
 			printf(" - 575X Plus\n");
 		if (BGE_IS_5705_PLUS(sc))

Modified: head/sys/dev/bge/if_bgereg.h
==============================================================================
--- head/sys/dev/bge/if_bgereg.h	Wed Oct  7 12:38:19 2009	(r197831)
+++ head/sys/dev/bge/if_bgereg.h	Wed Oct  7 13:12:43 2009	(r197832)
@@ -218,6 +218,7 @@
 #define	BGE_PCI_UNDI_TX_BD_PRODIDX_LO	0xAC
 #define	BGE_PCI_ISR_MBX_HI		0xB0
 #define	BGE_PCI_ISR_MBX_LO		0xB4
+#define	BGE_PCI_PRODID_ASICREV		0xBC
 
 /* PCI Misc. Host control register */
 #define	BGE_PCIMISCCTL_CLEAR_INTA	0x00000001
@@ -229,6 +230,7 @@
 #define	BGE_PCIMISCCTL_REG_WORDSWAP	0x00000040
 #define	BGE_PCIMISCCTL_INDIRECT_ACCESS	0x00000080
 #define	BGE_PCIMISCCTL_ASICREV		0xFFFF0000
+#define	BGE_PCIMISCCTL_ASICREV_SHIFT	16
 
 #define	BGE_HIF_SWAP_OPTIONS	(BGE_PCIMISCCTL_ENDIAN_WORDSWAP)
 #if BYTE_ORDER == LITTLE_ENDIAN
@@ -245,66 +247,72 @@
 	(BGE_HIF_SWAP_OPTIONS|BGE_PCIMISCCTL_CLEAR_INTA| \
 	 BGE_PCIMISCCTL_MASK_PCI_INTR|BGE_PCIMISCCTL_INDIRECT_ACCESS)
 
-#define	BGE_CHIPID_TIGON_I		0x40000000
-#define	BGE_CHIPID_TIGON_II		0x60000000
-#define	BGE_CHIPID_BCM5700_A0		0x70000000
-#define	BGE_CHIPID_BCM5700_A1		0x70010000
-#define	BGE_CHIPID_BCM5700_B0		0x71000000
-#define	BGE_CHIPID_BCM5700_B1		0x71010000
-#define	BGE_CHIPID_BCM5700_B2		0x71020000
-#define	BGE_CHIPID_BCM5700_B3		0x71030000
-#define	BGE_CHIPID_BCM5700_ALTIMA	0x71040000
-#define	BGE_CHIPID_BCM5700_C0		0x72000000
-#define	BGE_CHIPID_BCM5701_A0		0x00000000	/* grrrr */
-#define	BGE_CHIPID_BCM5701_B0		0x01000000
-#define	BGE_CHIPID_BCM5701_B2		0x01020000
-#define	BGE_CHIPID_BCM5701_B5		0x01050000
-#define	BGE_CHIPID_BCM5703_A0		0x10000000
-#define	BGE_CHIPID_BCM5703_A1		0x10010000
-#define	BGE_CHIPID_BCM5703_A2		0x10020000
-#define	BGE_CHIPID_BCM5703_A3		0x10030000
-#define	BGE_CHIPID_BCM5703_B0		0x11000000
-#define	BGE_CHIPID_BCM5704_A0		0x20000000
-#define	BGE_CHIPID_BCM5704_A1		0x20010000
-#define	BGE_CHIPID_BCM5704_A2		0x20020000
-#define	BGE_CHIPID_BCM5704_A3		0x20030000
-#define	BGE_CHIPID_BCM5704_B0		0x21000000
-#define	BGE_CHIPID_BCM5705_A0		0x30000000
-#define	BGE_CHIPID_BCM5705_A1		0x30010000
-#define	BGE_CHIPID_BCM5705_A2		0x30020000
-#define	BGE_CHIPID_BCM5705_A3		0x30030000
-#define	BGE_CHIPID_BCM5750_A0		0x40000000
-#define	BGE_CHIPID_BCM5750_A1		0x40010000
-#define	BGE_CHIPID_BCM5750_A3		0x40030000
-#define	BGE_CHIPID_BCM5750_B0		0x41000000
-#define	BGE_CHIPID_BCM5750_B1		0x41010000
-#define	BGE_CHIPID_BCM5750_C0		0x42000000
-#define	BGE_CHIPID_BCM5750_C1		0x42010000
-#define	BGE_CHIPID_BCM5750_C2		0x42020000
-#define	BGE_CHIPID_BCM5714_A0		0x50000000
-#define	BGE_CHIPID_BCM5752_A0		0x60000000
-#define	BGE_CHIPID_BCM5752_A1		0x60010000
-#define	BGE_CHIPID_BCM5752_A2		0x60020000
-#define	BGE_CHIPID_BCM5714_B0		0x80000000
-#define	BGE_CHIPID_BCM5714_B3		0x80030000
-#define	BGE_CHIPID_BCM5715_A0		0x90000000
-#define	BGE_CHIPID_BCM5715_A1		0x90010000
-#define	BGE_CHIPID_BCM5715_A3		0x90030000
-#define	BGE_CHIPID_BCM5755_A0		0xa0000000
-#define	BGE_CHIPID_BCM5755_A1		0xa0010000
-#define	BGE_CHIPID_BCM5755_A2		0xa0020000
-#define	BGE_CHIPID_BCM5722_A0		0xa2000000
-#define	BGE_CHIPID_BCM5754_A0		0xb0000000
-#define	BGE_CHIPID_BCM5754_A1		0xb0010000
-#define	BGE_CHIPID_BCM5754_A2		0xb0020000
-#define	BGE_CHIPID_BCM5787_A0		0xb0000000
-#define	BGE_CHIPID_BCM5787_A1		0xb0010000
-#define	BGE_CHIPID_BCM5787_A2		0xb0020000
-#define	BGE_CHIPID_BCM5906_A1		0xc0010000
-#define	BGE_CHIPID_BCM5906_A2		0xc0020000
+#define	BGE_CHIPID_TIGON_I		0x4000
+#define	BGE_CHIPID_TIGON_II		0x6000
+#define	BGE_CHIPID_BCM5700_A0		0x7000
+#define	BGE_CHIPID_BCM5700_A1		0x7001
+#define	BGE_CHIPID_BCM5700_B0		0x7100
+#define	BGE_CHIPID_BCM5700_B1		0x7101
+#define	BGE_CHIPID_BCM5700_B2		0x7102
+#define	BGE_CHIPID_BCM5700_B3		0x7103
+#define	BGE_CHIPID_BCM5700_ALTIMA	0x7104
+#define	BGE_CHIPID_BCM5700_C0		0x7200
+#define	BGE_CHIPID_BCM5701_A0		0x0000	/* grrrr */
+#define	BGE_CHIPID_BCM5701_B0		0x0100
+#define	BGE_CHIPID_BCM5701_B2		0x0102
+#define	BGE_CHIPID_BCM5701_B5		0x0105
+#define	BGE_CHIPID_BCM5703_A0		0x1000
+#define	BGE_CHIPID_BCM5703_A1		0x1001
+#define	BGE_CHIPID_BCM5703_A2		0x1002
+#define	BGE_CHIPID_BCM5703_A3		0x1003
+#define	BGE_CHIPID_BCM5703_B0		0x1100
+#define	BGE_CHIPID_BCM5704_A0		0x2000
+#define	BGE_CHIPID_BCM5704_A1		0x2001
+#define	BGE_CHIPID_BCM5704_A2		0x2002
+#define	BGE_CHIPID_BCM5704_A3		0x2003
+#define	BGE_CHIPID_BCM5704_B0		0x2100
+#define	BGE_CHIPID_BCM5705_A0		0x3000
+#define	BGE_CHIPID_BCM5705_A1		0x3001
+#define	BGE_CHIPID_BCM5705_A2		0x3002
+#define	BGE_CHIPID_BCM5705_A3		0x3003
+#define	BGE_CHIPID_BCM5750_A0		0x4000
+#define	BGE_CHIPID_BCM5750_A1		0x4001
+#define	BGE_CHIPID_BCM5750_A3		0x4000
+#define	BGE_CHIPID_BCM5750_B0		0x4100
+#define	BGE_CHIPID_BCM5750_B1		0x4101
+#define	BGE_CHIPID_BCM5750_C0		0x4200
+#define	BGE_CHIPID_BCM5750_C1		0x4201
+#define	BGE_CHIPID_BCM5750_C2		0x4202
+#define	BGE_CHIPID_BCM5714_A0		0x5000
+#define	BGE_CHIPID_BCM5752_A0		0x6000
+#define	BGE_CHIPID_BCM5752_A1		0x6001
+#define	BGE_CHIPID_BCM5752_A2		0x6002
+#define	BGE_CHIPID_BCM5714_B0		0x8000
+#define	BGE_CHIPID_BCM5714_B3		0x8003
+#define	BGE_CHIPID_BCM5715_A0		0x9000
+#define	BGE_CHIPID_BCM5715_A1		0x9001
+#define	BGE_CHIPID_BCM5715_A3		0x9003
+#define	BGE_CHIPID_BCM5755_A0		0xa000
+#define	BGE_CHIPID_BCM5755_A1		0xa001
+#define	BGE_CHIPID_BCM5755_A2		0xa002
+#define	BGE_CHIPID_BCM5722_A0		0xa200
+#define	BGE_CHIPID_BCM5754_A0		0xb000
+#define	BGE_CHIPID_BCM5754_A1		0xb001
+#define	BGE_CHIPID_BCM5754_A2		0xb002
+#define	BGE_CHIPID_BCM5761_A0		0x5761000
+#define	BGE_CHIPID_BCM5761_A1		0x5761100
+#define	BGE_CHIPID_BCM5784_A0		0x5784000
+#define	BGE_CHIPID_BCM5784_A1		0x5784100
+#define	BGE_CHIPID_BCM5787_A0		0xb000
+#define	BGE_CHIPID_BCM5787_A1		0xb001
+#define	BGE_CHIPID_BCM5787_A2		0xb002
+#define	BGE_CHIPID_BCM5906_A1		0xc001
+#define	BGE_CHIPID_BCM5906_A2		0xc002
+#define	BGE_CHIPID_BCM57780_A0		0x57780000
+#define	BGE_CHIPID_BCM57780_A1		0x57780001
 
 /* shorthand one */
-#define	BGE_ASICREV(x)			((x) >> 28)
+#define	BGE_ASICREV(x)			((x) >> 12)
 #define	BGE_ASICREV_BCM5701		0x00
 #define	BGE_ASICREV_BCM5703		0x01
 #define	BGE_ASICREV_BCM5704		0x02
@@ -319,9 +327,16 @@
 #define	BGE_ASICREV_BCM5754		0x0b
 #define	BGE_ASICREV_BCM5787		0x0b
 #define	BGE_ASICREV_BCM5906		0x0c
+/* Should consult BGE_PCI_PRODID_ASICREV for ChipID */
+#define	BGE_ASICREV_USE_PRODID_REG	0x0f
+/* BGE_PCI_PRODID_ASICREV ASIC rev. identifiers. */
+#define	BGE_ASICREV_BCM5761		0x5761
+#define	BGE_ASICREV_BCM5784		0x5784
+#define	BGE_ASICREV_BCM5785		0x5785
+#define	BGE_ASICREV_BCM57780		0x57780
 
 /* chip revisions */
-#define	BGE_CHIPREV(x)			((x) >> 24)
+#define	BGE_CHIPREV(x)			((x) >> 8)
 #define	BGE_CHIPREV_5700_AX		0x70
 #define	BGE_CHIPREV_5700_BX		0x71
 #define	BGE_CHIPREV_5700_CX		0x72
@@ -331,6 +346,9 @@
 #define	BGE_CHIPREV_5704_BX		0x21
 #define	BGE_CHIPREV_5750_AX		0x40
 #define	BGE_CHIPREV_5750_BX		0x41
+/* BGE_PCI_PRODID_ASICREV chip rev. identifiers. */
+#define	BGE_CHIPREV_5761_AX		0x57611
+#define	BGE_CHIPREV_5784_AX		0x57841
 
 /* PCI DMA Read/Write Control register */
 #define	BGE_PCIDMARWCTL_MINDMA		0x000000FF
@@ -861,6 +879,7 @@
 #define	BGE_SDCMODE_RESET		0x00000001
 #define	BGE_SDCMODE_ENABLE		0x00000002
 #define	BGE_SDCMODE_ATTN		0x00000004
+#define	BGE_SDCMODE_CDELAY		0x00000010
 
 /* Send Data completion status register */
 #define	BGE_SDCSTAT_ATTN		0x00000004
@@ -1378,6 +1397,9 @@
 #define	BGE_RDMAMODE_PCI_FIFOOREAD_ATTN	0x00000100
 #define	BGE_RDMAMODE_LOCWRITE_TOOBIG	0x00000200
 #define	BGE_RDMAMODE_ALL_ATTNS		0x000003FC
+#define	BGE_RDMAMODE_BD_SBD_CRPT_ATTN	0x00000800
+#define	BGE_RDMAMODE_MBUF_RBD_CRPT_ATTN	0x00001000
+#define	BGE_RDMAMODE_MBUF_SBD_CRPT_ATTN	0x00002000
 #define	BGE_RDMAMODE_FIFO_SIZE_128	0x00020000
 #define	BGE_RDMAMODE_FIFO_LONG_BURST	0x00030000
 
@@ -2101,6 +2123,7 @@ struct bge_status_block {
 #define	BCOM_DEVICEID_BCM5720		0x1658
 #define	BCOM_DEVICEID_BCM5721		0x1659
 #define	BCOM_DEVICEID_BCM5722		0x165A
+#define	BCOM_DEVICEID_BCM5723		0x165B
 #define	BCOM_DEVICEID_BCM5750		0x1676
 #define	BCOM_DEVICEID_BCM5750M		0x167C
 #define	BCOM_DEVICEID_BCM5751		0x1677
@@ -2115,13 +2138,22 @@ struct bge_status_block {
 #define	BCOM_DEVICEID_BCM5754M		0x1672
 #define	BCOM_DEVICEID_BCM5755		0x167B
 #define	BCOM_DEVICEID_BCM5755M		0x1673
+#define	BCOM_DEVICEID_BCM5761		0x1681
+#define	BCOM_DEVICEID_BCM5761E		0x1680
+#define	BCOM_DEVICEID_BCM5761S		0x1688
+#define	BCOM_DEVICEID_BCM5761SE		0x1689
+#define	BCOM_DEVICEID_BCM5764		0x1684
 #define	BCOM_DEVICEID_BCM5780		0x166A
 #define	BCOM_DEVICEID_BCM5780S		0x166B
 #define	BCOM_DEVICEID_BCM5781		0x16DD
 #define	BCOM_DEVICEID_BCM5782		0x1696
+#define	BCOM_DEVICEID_BCM5784		0x1698
+#define	BCOM_DEVICEID_BCM5785F		0x16a0
+#define	BCOM_DEVICEID_BCM5785G		0x1699
 #define	BCOM_DEVICEID_BCM5786		0x169A
 #define	BCOM_DEVICEID_BCM5787		0x169B
 #define	BCOM_DEVICEID_BCM5787M		0x1693
+#define	BCOM_DEVICEID_BCM5787F		0x167f
 #define	BCOM_DEVICEID_BCM5788		0x169C
 #define	BCOM_DEVICEID_BCM5789		0x169D
 #define	BCOM_DEVICEID_BCM5901		0x170D
@@ -2129,6 +2161,10 @@ struct bge_status_block {
 #define	BCOM_DEVICEID_BCM5903M		0x16FF
 #define	BCOM_DEVICEID_BCM5906		0x1712
 #define	BCOM_DEVICEID_BCM5906M		0x1713
+#define	BCOM_DEVICEID_BCM57760		0x1690
+#define	BCOM_DEVICEID_BCM57780		0x1692
+#define	BCOM_DEVICEID_BCM57788		0x1691
+#define	BCOM_DEVICEID_BCM57790		0x1694
 
 /*
  * Alteon AceNIC PCI vendor/device ID.
@@ -2179,6 +2215,14 @@ struct bge_status_block {
 #define	SUN_VENDORID			0x108e
 
 /*
+ * Fujitsu vendor/device IDs
+ */
+#define	FJTSU_VENDORID			0x10cf
+#define	FJTSU_DEVICEID_PW008GE5		0x11a1
+#define	FJTSU_DEVICEID_PW008GE4		0x11a2
+#define	FJTSU_DEVICEID_PP250450		0x11cc		/* PRIMEPOWER250/450 LAN */
+
+/*
  * Offset of MAC address inside EEPROM.
  */
 #define	BGE_EE_MAC_OFFSET		0x7C
@@ -2558,6 +2602,7 @@ struct bge_softc {
 #define	BGE_FLAG_5705_PLUS	0x00002000
 #define	BGE_FLAG_5714_FAMILY	0x00004000
 #define	BGE_FLAG_575X_PLUS	0x00008000
+#define	BGE_FLAG_5755_PLUS	0x00010000
 #define	BGE_FLAG_RX_ALIGNBUG	0x00100000
 #define	BGE_FLAG_NO_3LED	0x00200000
 #define	BGE_FLAG_ADC_BUG	0x00400000
@@ -2568,8 +2613,8 @@ struct bge_softc {
 #define	BGE_FLAG_CRC_BUG	0x08000000
 #define	BGE_FLAG_5788		0x20000000
 	uint32_t		bge_chipid;
-	uint8_t			bge_asicrev;
-	uint8_t			bge_chiprev;
+	uint32_t		bge_asicrev;
+	uint32_t		bge_chiprev;
 	uint8_t			bge_asf_mode;
 	uint8_t			bge_asf_count;
 	struct bge_ring_data	bge_ldata;	/* rings */



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