Date: Tue, 18 Oct 2005 19:57:28 +0200 From: "Poul-Henning Kamp" <phk@phk.freebsd.dk> To: Nate Lawson <nate@root.org> Cc: cvs-src@FreeBSD.org, src-committers@FreeBSD.org, Andrew Gallatin <gallatin@cs.duke.edu>, cvs-all@FreeBSD.org Subject: Re: cvs commit: src/sys/amd64/amd64 cpu_switch.S machdep.c Message-ID: <69576.1129658248@critter.freebsd.dk> In-Reply-To: Your message of "Tue, 18 Oct 2005 09:50:37 PDT." <435527DD.3040007@root.org>
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In message <435527DD.3040007@root.org>, Nate Lawson writes: >I have good information that in the near future, most designs will have >guaranteed synchronized TSC across all CPUs. ...and when those chips arrive, we can hopefully identify them by some bit in some MSR and then we can use the TSC on them. This is a good move and it is only too bad that it's taken the chip manufacturers 10 years to figure this out. -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 phk@FreeBSD.ORG | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence.
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