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Date:      Sun, 19 Apr 1998 01:17:28 +0200
From:      Tor Egge <Tor.Egge@idi.ntnu.no>
To:        rickl@ic.net
Cc:        smp@FreeBSD.ORG
Subject:   Re: SMP Problems
Message-ID:  <199804182317.BAA04014@pat.idi.ntnu.no>
In-Reply-To: Your message of "Sat, 18 Apr 1998 17:29:55 -0400 (EDT)"
References:  <XFMail.980418172955.rickl@ic.net>

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> Hi,
> 
> I noticed a problem booting since Torr's last round of changes to pci.c and
> mapic.c.  I was using a P6DOF motherboard which reated quite well to Torr's
> changes (e.g. they worked well. I added them from the posted patch).  I
> then switched to a Micronics W6Li motherboard (the P6DOF had stability problems
> with RAM > 64MB) and now the system does not get beyond the clock attach test.
> I am enclosing the mptable but the dmesg dump is from a working kernel
> before Torr's changes.  The reason for the dmesg output is that I could not
> get one for the failed kernel.
> 
> I found that by using the sources prior to Torr's committed changes (without
> adding them as a patch)the smp kernel boots without problem.

Revision 1.28 of mpapic.c ignores the polarity and trigger mode on
interrupts on the ISA bus.

Revision 1.29 of mpapic.c uses the information supplied in the MP
table since some broken bioses registers PCI interrupts as ISA
interrupts (but with `level' trigger mode and `active-low' polarity)
and the IOAPIC should be programmed accordingly.

While working fine for one kind of MP table breakage, it might to have
had unintended side effects for your kind of MP table breakage (where
many ISA interrupts are registered with `level' trigger mode).

Try the following patch.

Index: mpapic.c
===================================================================
RCS file: /home/ncvs/src/sys/i386/i386/mpapic.c,v
retrieving revision 1.29
diff -u -r1.29 mpapic.c
--- mpapic.c	1998/04/01 21:07:34	1.29
+++ mpapic.c	1998/04/18 23:12:31
@@ -164,7 +164,7 @@
 	if (apic == 0) {
 		maxpin = REDIRCNT_IOAPIC(apic);		/* pins in APIC */
 		for (pin = 0; pin < maxpin; ++pin) {
-			int bus;
+			int bus, bustype;
 
 			/* we only deal with vectored INTs here */
 			if (apic_int_type(apic, pin) != 0)
@@ -174,12 +174,22 @@
 			bus = apic_src_bus_id(apic, pin);
 			if (bus == -1)
 				continue;
+			bustype = apic_bus_type(bus);
 
-			flags = DEFAULT_FLAGS;
-			level = trigger(apic, pin, &flags);
-			if (level == 1)
-				apic_pin_trigger[apic] |= (1 << pin);
-			polarity(apic, pin, &flags, level);
+			/* the "ISA" type INTerrupts */
+			if ((bustype == ISA || bustype == EISA) &&
+			    apic_polarity(apic, pin) != 0x3) {
+				flags = DEFAULT_ISA_FLAGS;
+			}
+
+			/* PCI or other bus */
+			else {
+				flags = DEFAULT_FLAGS;
+				level = trigger(apic, pin, &flags);
+				if (level == 1)
+					apic_pin_trigger[apic] |= (1 << pin);
+				polarity(apic, pin, &flags, level);
+			}
 
 			/* program the appropriate registers */
 			select = pin * 2 + IOAPIC_REDTBL0;	/* register */


- Tor Egge

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