Date: Sun, 14 Sep 2014 11:18:09 +0200 From: Carsten Mattner <carstenmattner@gmail.com> To: Konstantin Belousov <kostikbel@gmail.com> Cc: freebsd-arch@freebsd.org Subject: Re: Intel MPX (Skylake ISA) support? Message-ID: <CACY%2BHvqGGhfqVaNuvxDdkmAzK6wX1wVv4V5Pw3uZZhfJNH_2zw@mail.gmail.com> In-Reply-To: <20140914090033.GA2737@kib.kiev.ua> References: <CACY%2BHvoMDFLJLy7hz3guJNrJH8gmi5Vh9-rYeRErr2JgDhV2yw@mail.gmail.com> <20140913162059.GU2737@kib.kiev.ua> <CACY%2BHvqKYhXzPgvK8CWpp4NMcD2_c3xzownVBk6O=8_4PiM%2Bjw@mail.gmail.com> <20140914090033.GA2737@kib.kiev.ua>
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On Sun, Sep 14, 2014 at 11:00 AM, Konstantin Belousov <kostikbel@gmail.com> wrote: > On Sat, Sep 13, 2014 at 09:47:10PM +0200, Carsten Mattner wrote: >> On Sat, Sep 13, 2014 at 6:20 PM, Konstantin Belousov >> <kostikbel@gmail.com> wrote: >> > On Sat, Sep 13, 2014 at 12:45:16PM +0200, Carsten Mattner wrote: >> >> Are there any plans to include the necessary (kernel, libc) support for >> >> Intel MPX (https://en.wikipedia.org/wiki/Intel_MPX)? >> > >> > I looked at this several times. The 319433 (Instructions Set Extensions >> > prog reference) even at the current revision 20 still seems to not provide >> > the complete documentation on the CPU side. E.g., could you point me at >> > the description of the save area for MPX ? It is required since usermode >> > bndcfg register can only be set by restoring from the XSAVE area. >> > >> > That said, I believe that most, if not all, of the needed kernel-side >> > support is already there by the generic XSAVE code. >> > >> > I never see any specification of runtime services expected by the code >> > generated by mpx-enabled gcc. >> >> Is https://lkml.org/lkml/2014/9/11/182 helpful? > > Not for me. I have zero interest in reverse-engineering Linux code > for core CPU functionality. Intel usually provides high-quality > documentation for the processors, and I hope that they will provide all > needed information together with the hardware release. > > Another significant missing piece is the lack of description of the > initial state and expectation of the runtime support in the ABI > document. The ABI draft 0.3 from July 17, 2013, specially edited for > MPX, only talks about argument passing conventions and dwarf, it seems. > > It is curious discussion about non-feasibility of implementing MPX > translation tables in usermode. Just for fun, I will try to do > something purely in usermode (when/if hardware will be available). More details I was able to find with links to hopefully descriptive documentation. IIUC developers have been using a well known Intel CPU simulator, but I'm in the dark there. gcc: http://gcc.gnu.org/wiki/Intel%20MPX%20support%20in%20the%20GCC%20compiler glibc: https://sourceware.org/ml/libc-alpha/2014-03/msg00491.html https://sourceware.org/ml/libc-alpha/2014-03/msg00543.html https://sourceware.org/ml/libc-alpha/2014-03/msg00605.html
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