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Date:      Mon, 02 Feb 2015 09:27:42 -0800
From:      Sean Bruno <sbruno@ignoranthack.me>
To:        "Pieper, Jeffrey E" <jeffrey.e.pieper@intel.com>,  Jack Vogel <jfvogel@gmail.com>, hiren panchasara <hiren@strugglingcoder.info>
Cc:        FreeBSD Net <freebsd-net@freebsd.org>
Subject:   Re: Intel 82574L (em)
Message-ID:  <54CFB38E.1040408@ignoranthack.me>
In-Reply-To: <2A35EA60C3C77D438915767F458D6568806C25DE@ORSMSX111.amr.corp.intel.com>
References:  <54CBF396.3090903@ignoranthack.me> <20150131010014.GB19333@strugglingcoder.info> <CAFOYbcmRR_1uZsgc3CVBd52K-13U_=EZnqy%2BXPPUoCdfd8wUSQ@mail.gmail.com> <2A35EA60C3C77D438915767F458D6568806C25DE@ORSMSX111.amr.corp.intel.com>

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On 02/02/15 08:42, Pieper, Jeffrey E wrote:
> Iirc, we experienced issues with 82574L, where the interface will
> hang/die. This is resolved in both FreeBSD and Linux by forcing
> ASPM off and disabling MSIX.
> 
> Jeff
> 
> 

Are you running tests with the multi-queue implementation in the h/w
and driver turned on?

sean

> ----Original Message----- From: owner-freebsd-net@freebsd.org
> [mailto:owner-freebsd-net@freebsd.org] On Behalf Of Jack Vogel 
> Sent: Friday, January 30, 2015 8:30 PM To: hiren panchasara Cc:
> FreeBSD Net Subject: Re: Intel 82574L (em)
> 
> Yup, I wrote that :)
> 
> Sean, I will check around to see if anything may have changed in
> that regard.
> 
> Jack
> 
> 
> On Fri, Jan 30, 2015 at 5:00 PM, hiren panchasara < 
> hiren@strugglingcoder.info> wrote:
> 
>> On Fri, Jan 30, 2015 at 01:11:50PM -0800, Sean Bruno wrote:
>>> 
>>> -----BEGIN PGP SIGNED MESSAGE----- Hash: SHA512
>>> 
>>> 
>> http://www.intel.com/content/dam/doc/datasheet/82574l-gbe-controller-datasheet.pdf
>>>
>>>
>> 
According to 7.1.11, this device does indeed have 2 queues for stuff and
>>> or things.  So, basic RSS would be possible in something like
>>> an Atom
>> box.
>>> 
>>> I note that the em(4) driver intentionally disables this on 
>>> initialization.  I'm up for some science on my new shiny, soon
>>> to be router box. Any reason not to default to 1 queue and
>>> allow loader.conf to raise it to 2?
>> 
>> Intel folks know better but it seems this is hartwell.
>> 
>> em_setup_msix() in very start says:
>> 
>> /* ** Setup MSI/X for Hartwell: tests have shown ** use of two
>> queues to be unstable, and to ** provide no great gain anyway, so
>> we simply ** seperate the interrupts and use a single queue. */
>> 
>> Things may have changed now. I guess you can try enabling it and
>> find out :-)
>> 
>> cheers, Hiren
>> 
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-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2

iQF8BAEBCgBmBQJUz7OLXxSAAAAAAC4AKGlzc3Vlci1mcHJAbm90YXRpb25zLm9w
ZW5wZ3AuZmlmdGhob3JzZW1hbi5uZXRCQUFENDYzMkU3MTIxREU4RDIwOTk3REQx
MjAxRUZDQTFFNzI3RTY0AAoJEBIB78oecn5kYn0IALVCtNNmWMWIRLlbcVGDg9wo
KUbKpvN4UBxOuAvsav8Hussxvy+gh4UXZvgqZ2opTElRrPiUb/iGXa967LWsRaTB
TrbvnFE7rJp2xGVlG+rsID+wSdsEAX/isTJWOvpWIqPEULaFvtFh/LUPUrux51Ca
SPNzJ+LAh/vWk4sOXN+4PxICiaprlRDs0HF/Mqh5mh8W5TwE3OZy74js7izhNqZS
NgowzDyYOq6uhxHZRAC5/GUdpX+ybyCRFZgqKBrNy8BYZV9f+wts2vh7IzwDBSE+
0ikcM2QGunsr9HH2mnermE2lYF4QKL1Zm8m0mh+TNNIA1O/8Qi4mbE1uMdrzJv4=
=9wHn
-----END PGP SIGNATURE-----



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