Date: Thu, 12 Aug 2010 01:32:46 -0600 (MDT) From: "M. Warner Losh" <imp@bsdimp.com> To: c.jayachandran@gmail.com Cc: jmallett@FreeBSD.org, freebsd-mips@FreeBSD.org Subject: Re: SMP support for n64 patch. Message-ID: <20100812.013246.575506241299663760.imp@bsdimp.com> In-Reply-To: <AANLkTikfQ2FokHv5khjUkBjOaxVMdcQfYS5xK_U_xUX0@mail.gmail.com> References: <AANLkTimQVoRTc3CHNGHNAS2-PRqiZ8BiStekp6tj1Qc4@mail.gmail.com> <20100812.010121.123339447223515204.imp@bsdimp.com> <AANLkTikfQ2FokHv5khjUkBjOaxVMdcQfYS5xK_U_xUX0@mail.gmail.com>
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In message: <AANLkTikfQ2FokHv5khjUkBjOaxVMdcQfYS5xK_U_xUX0@mail.gmail.c=
om>
"Jayachandran C." <c.jayachandran@gmail.com> writes:
: On Thu, Aug 12, 2010 at 12:31 PM, M. Warner Losh <imp@bsdimp.com> wro=
te:
: > In message: <AANLkTimQVoRTc3CHNGHNAS2-PRqiZ8BiStekp6tj1Qc4@mail.gma=
il.com>
: > =A0 =A0 =A0 =A0 =A0 =A0"Jayachandran C." <c.jayachandran@gmail.com>=
writes:
: > : I've attached a patch that enables SMP support for N64 builds (I =
can
: > : get XLR come up multi-user with 32 cpus with this).
: > :
: > : I ended up making KX bit in status register set when you are in
: > : userspace, since the PCPU area is now mapped in XKSEG. =A0The PCP=
U area
: > : needs to be accessed in =A0I have reverted the earlier change tha=
t
: > : enabled KX on kernel entry from userspace since that is no longer=
: > : needed.
: > :
: > : Please let me know your comments.
: >
: > If I understand correctly, and I'm sure the pedants will tell me
: > otherwise, the KX bit means that a legal reference to a kernel addr=
ess
: > is made, it will be interpreted as a 64-bit address when KX is set,=
: > and a 32-bit address when it is clear.
: >
: > It does not grant any additional access to the kernel memory that
: > isn't already granted by the TLB entries, correct? =A0It doesn't gr=
ant
: > access to the kernel memory, correct?
: =
: My understanding is this, but I was not able to find any reference
: that says exactly that (so was not sure if some MIPS implementations
: have issues here).
Yes. I think that the references I cited below reaffirm this. Kernel
addresses can only be accessed when KSU =3D=3D 0.
: > But I'm a little confused. =A0I'm reading through section 4.5 of th=
e
: > Privileged Resources Architecture document from mips
: > (MD00091-2B-MIPS74PRA-AFP-02.50.pdf) and table 4-1 suggests that
: > running with it in user mode won't change what can be accessed. =A0=
So
: > why would it need to be turned on at all in user mode? =A0Rather th=
an
: > the xtlb routine being called for the refill for a kernel address, =
it
: > will fault instead.
: >
: > Or is this an optimization for the xtlb handler which needs to get =
to
: > pcpu data?
: =
: Yes, otherwise I need to add code to the XTLB handler to enable KX
: (which will involve read and write to status register and the related=
: hazards). Enabling KX everywhere, including userspace avoids this.
Ah, that makes perfect sense. Based on that, I can't see any reason
to hold this back.
Warner
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