Date: Wed, 25 Oct 2000 16:59:55 -0400 (EDT) From: David Miller <dmiller@search.sparks.net> To: Peter Jeremy <peter.jeremy@alcatel.com.au> Cc: freebsd-hardware@FreeBSD.ORG Subject: Re: Multiple PCI busses? Message-ID: <Pine.BSF.4.21.0010251655310.26866-100000@search.sparks.net> In-Reply-To: <00Oct26.075621est.115449@border.alcanet.com.au>
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On Thu, 26 Oct 2000, Peter Jeremy wrote: > [Catching up on old mail] > On 2000-Sep-23 08:08:22 -0400, David Miller <dmiller@search.sparks.net> wrote: > >Anyone have any idea what the upper end of thruput is? I'm sure a few > >thousand packets per second is doable, but how abot the tens of > >thousands? > > Last February I did some experimenting using a P-133 box and could > route just over 10,000 (small) packets/sec (CPU limited) between > different LANs. The throughput testing gave me pretty much wire > speed[1]. This was using a couple of Intel Pro/100+ cards connecting > to 100baseTX half-duplex hubs. Based on this, I'd say you'd be > looking at hundreds of thousands of packets/sec on a high-end > processor. Your overall throughput would come down to bus bandwidth > (PCI and RAM). > > > Is this an area where a big cache on a > >xeon processor would help more than extra CPU cycles? > > As long as routing code, device driver code and your routing tables > fit into the cache, you should be OK. Cache is pretty much irrelevant That won't work, full 'net BGP tables aren't going to fit into the cache:) > to the actual packets you are routing - the CPU only needs to read the > destination IP address out of the header once for each packet (and do > a few mbuf management accesses). It primarily just gets in the way > of the PCI DMA :-). > > [1] Given a decent NIC, the CPU load is pretty much determined by the > packet rate, independent of the packet size. I'd plan on using the adaptec 64 bit quad port cards on independent 64 bit busses, and having the main memory interleaved by using for dimms instead of one or two. I guess what I was wondering was if the packet would be DMA'd into cache and could avoid a trip to the sdram, but it sounds like the answer is no. Since the routing tables won't fit either it sounds like there's no real value to a big cache. Thanks for the feedback! --- David To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hardware" in the body of the message
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