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Date:      Wed, 04 Mar 1998 20:45:21 +0100
From:      Tor Egge <Tor.Egge@idi.ntnu.no>
To:        adkin003@tc.umn.edu
Cc:        smp@FreeBSD.ORG
Subject:   Re: Current SMP kernel panics on booting
Message-ID:  <199803041945.UAA07342@pat.idi.ntnu.no>
In-Reply-To: Your message of "Wed, 4 Mar 1998 12:30:15 -0600 (CST)"
References:  <Pine.NEB.3.96.980304122310.1078A-100000@samthedog>

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> I've done that (usually the first thing I do if I get a panic on a new
> kernel), but I have the same panic. The mb is a tyan tomcatII.  As a
> guess, mbinit happens right after the 8254 intr is enabled. Could the
> clock interrupt forwarding could be causing the problem. Any way to shut
> that down? Is it all ifdef'd by BETTER_CLOCK? 

I suspect this has nothing to do with interrupt forwarding, but with
the 8254 clock being routed via a different pin on the IO apic.

Try the following patch:

Index: sys/i386/isa/intr_machdep.c
===================================================================
RCS file: /home/ncvs/src/sys/i386/isa/intr_machdep.c,v
retrieving revision 1.9
diff -u -r1.9 intr_machdep.c
--- intr_machdep.c	1998/03/03 22:56:29	1.9
+++ intr_machdep.c	1998/03/04 19:24:38
@@ -466,6 +466,11 @@
 	 * Reprogram the vector in the IO APIC.
 	 */
 	select = (intr * 2) + IOAPIC_REDTBL0;
+
+	/* Handle 8254 being routed via pin 2 on the IO APIC */
+	if (intr == 0 && (mask8254 == (1 << 2)))
+		select = (2 * 2) + IOAPIC_REDTBL0;
+
 	value = io_apic_read(0, select) & ~IOART_INTVEC;
 	io_apic_write(0, select, value | vector);
 #else

or comment out the definition of APIC_INTR_HIGHPRI_CLOCK in
sys/i386/include/smptests.h.

On my SMP systems I get the message

	APIC_IO: routing 8254 via 8259 on pin 0

during boot.

If you get 
	APIC_IO: routing 8254 via pin 2

during boot, this is probably related to the problem.

I would like feedback on what works and what doesn't on this.

- Tor Egge

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