Date: Wed, 15 Jan 2014 03:57:41 +0000 (UTC) From: Marcel Moolenaar <marcel@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r260666 - head/sys/ia64/ia64 Message-ID: <201401150357.s0F3vf73026162@svn.freebsd.org>
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Author: marcel Date: Wed Jan 15 03:57:41 2014 New Revision: 260666 URL: http://svnweb.freebsd.org/changeset/base/260666 Log: In the nested TLB fault handler, for a direct-mapped address, make sure to clear the lower 12 bits. We're adding the translation attributes to the physical address and non-zero bits in the first 12 bits would give us something unexpected, including invalid bit values. Those trigger nested general protection faults. We do not have to clear the region bits, because they are ignored anyway, so we can replace an existing dep instruction with the one we need. This fixes GP faults for the swapper thread, as it's the only thread that has a direct-mapped stack. Since the bug is in the nested TLB fault handler, the frequency of hitting the GP is in the order of hours/days under load. Modified: head/sys/ia64/ia64/exception.S Modified: head/sys/ia64/ia64/exception.S ============================================================================== --- head/sys/ia64/ia64/exception.S Wed Jan 15 01:27:01 2014 (r260665) +++ head/sys/ia64/ia64/exception.S Wed Jan 15 03:57:41 2014 (r260666) @@ -1026,7 +1026,7 @@ IVT_ENTRY(Data_Nested_TLB, 0x1400) } { .mii mov cr.itir=r26 -(p12) dep r28=0,r30,61,3 +(p12) dep r28=0,r30,0,12 (p13) extr.u r28=r30,3*PAGE_SHIFT-8, PAGE_SHIFT-3 // dir L0 index ;; }
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