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Date:      Wed, 06 Sep 2000 16:51:12 +0900
From:      Kenjiro Cho <kjc@csl.sony.co.jp>
To:        bde@zeta.org.au
Cc:        freebsd-net@FreeBSD.ORG
Subject:   rdtsc overhead (was Re: Running ALTQ)
Message-ID:  <20000906165112Y.kjc@csl.sony.co.jp>
In-Reply-To: <Pine.BSF.4.21.0009060123480.24432-100000@besplex.bde.org>
References:  <20000905133613H.kjc@csl.sony.co.jp> <Pine.BSF.4.21.0009060123480.24432-100000@besplex.bde.org>

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Bruce Evans wrote:
> > It requires only one machine cycle to read a processor cycle couner
> > (timestamp counter for pentium), which is much cheaper than using
> > microtime().  However, it doesn't affect the kernel timer resolution.
> 
> It takes more than one cycle, at least in a loop.  I just retried the
> following:
> 
> main()
> {
> 	__asm("
> 	movl	$100000000,%ecx
> 	.align	4,0x90
> 1:
> 	rdtsc
> 	decl	%ecx
> 	nop
> 	jne	1b
> 	");
> }
> 
> and it took 30 cycles on a Celeron and 12 cycles on a P5 (32 and 14
> cycles, respectively, including 2 cycles of loop overhead).

Hmmm, I've confirmed the result.  If another rdtsc is inserted in the
loop, it almost doubles the execution time, which suggests the loop
overhead is negligible.

But 30 cycles sound a bit too long.  As I understand it, rdtsc is not
a serializing instruction.   Is it more than latching the counter plus
reading the 64bit value into 2 32bit registers?

-Kenjiro


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