Skip site navigation (1)Skip section navigation (2)
Date:      Wed, 08 Jul 2009 12:30:46 +0200
From:      Sebastian Huber <sebastian.huber@embedded-brains.de>
To:        =?ISO-8859-2?Q?Piotr_Zi=EAcik?= <kosmo@semihalf.com>
Cc:        Rafal Jaworowski <raj@semihalf.com>, freebsd-arm@freebsd.org, freebsd-usb@freebsd.org, thompsa@freebsd.org
Subject:   Re: CPU Cache and busdma usage in USB
Message-ID:  <4A547556.4050801@embedded-brains.de>
In-Reply-To: <200907081216.40100.kosmo@semihalf.com>
References:  <200906231035.43096.kosmo@semihalf.com>	<37C51279-42D8-49DE-8249-0DA386EBB062@semihalf.com>	<200907081103.45388.hselasky@c2i.net> <200907081216.40100.kosmo@semihalf.com>

next in thread | previous in thread | raw e-mail | index | archive | help
Hi!

The general approach for systems with no hardware cache coherence protocol
should be:

Memory to device DMA transfer of a buffer:

1. write all modified cache lines of the buffer back to memory (cache flush for
buffer)
2. start DMA transfer

Device to memory DMA transfer of a buffer:

1. invalidate the cache of the buffer, here you have to make sure that this
buffer does not share a cache line with other buffers (!)
2. start DMA transfer
3. all accesses to the buffer via the cache must wait until the DMA has finished

CU

-- 
Sebastian Huber, Embedded Brains GmbH

Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone   : +49 89 18 90 80 79-6
Fax     : +49 89 18 90 80 79-9
E-Mail  : sebastian.huber@embedded-brains.de
PGP     : Public key available on request

Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?4A547556.4050801>