Date: Sat, 5 Jan 2013 04:20:14 +0000 (UTC) From: Neel Natu <neel@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r245055 - head/sys/x86/include Message-ID: <201301050420.r054KEad063066@svn.freebsd.org>
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Author: neel Date: Sat Jan 5 04:20:14 2013 New Revision: 245055 URL: http://svnweb.freebsd.org/changeset/base/245055 Log: Add macros required to enable VMX operation on Intel processors. Obtained from: NetApp Modified: head/sys/x86/include/specialreg.h Modified: head/sys/x86/include/specialreg.h ============================================================================== --- head/sys/x86/include/specialreg.h Sat Jan 5 03:35:30 2013 (r245054) +++ head/sys/x86/include/specialreg.h Sat Jan 5 04:20:14 2013 (r245055) @@ -68,6 +68,7 @@ #define CR4_PCE 0x00000100 /* Performance monitoring counter enable */ #define CR4_FXSR 0x00000200 /* Fast FPU save/restore used by OS */ #define CR4_XMM 0x00000400 /* enable SIMD/MMX2 to use except 16 */ +#define CR4_VMXE 0x00002000 /* enable VMX operation (Intel-specific) */ #define CR4_FSGSBASE 0x00010000 /* Enable FS/GS BASE accessing instructions */ #define CR4_PCIDE 0x00020000 /* Enable Context ID */ #define CR4_XSAVE 0x00040000 /* XSETBV/XGETBV */ @@ -310,6 +311,7 @@ #define MSR_APICBASE 0x01b #define MSR_EBL_CR_POWERON 0x02a #define MSR_TEST_CTL 0x033 +#define MSR_IA32_FEATURE_CONTROL 0x03a #define MSR_BIOS_UPDT_TRIG 0x079 #define MSR_BBL_CR_D0 0x088 #define MSR_BBL_CR_D1 0x089
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