Date: Mon, 14 Jul 1997 15:44:19 +0300 From: Nadav Eiron <nadav@barcode.co.il> To: dmaddox@scsn.net Cc: Wes Peters - Softweyr LLC <softweyr@xmission.com>, Nick Johnson <spatula@gulf.net>, questions@FreeBSD.ORG Subject: Re: A few solutions Message-ID: <33CA1F23.1876@barcode.co.il> References: <Pine.BSI.3.96.970713130431.16120A-100000@pompano.pcola.gulf.net> <199707140404.WAA07219@xmission.xmission.com> <19970714072626.64852@scsn.net> <33CA1547.AD3@barcode.co.il> <19970714082521.61598@scsn.net>
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Donald J. Maddox wrote: > > On Mon, Jul 14, 1997 at 03:02:15PM +0300, Nadav Eiron wrote: [snip] > > Well, all I can say is that according to the User's Manual for my > ASUS P/I-P55T2P4 mainboard, all I need for ECC is parity RAM, and > ECC enabled. > > I notice, however, that the ECC supported by this MB only supports > 1-bit error correction... Maybe the ECC RAM you two are speaking of > allows for more sophisticated error correction? Probably. Saying they correct 1 bit is not a complete specification of the strength of the code they use. You need to know one bit out of how many. Standard parity RAM uses one extra bit per byte, and can detect one bad bit per byte. By aggregating these extra bits from more than one byte you may be able to, say, correct one bit in 32bits or such (sorry, didn't make the calculations, I took coding theory back when I was doing my M.Sc. and I don't remember that much :-( ), but depending on the kind of errors you have, this may be better *or* worse than just parity. If you have 32bits with 4 bad bits, each in a different byte, standard parity will detect it, but this type of ECC won't. There is no such thing as a free lunch, at least not in coding. Nadav
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