Date: Wed, 15 Apr 2009 09:53:33 -0700 From: Sean Bruno <sean.bruno@dsl-only.net> To: Andreas Tobler <andreast-list@fgznet.ch> Cc: freebsd-firewire <freebsd-firewire@FreeBSD.org>, scottl <scottl@freebsd.org>, Marius Strobl <marius@alchemy.franken.de> Subject: Re: fwochi.c and bus_space_barrier() Message-ID: <1239814413.15474.2.camel@localhost.localdomain> In-Reply-To: <49E4DF9F.1090804@fgznet.ch> References: <1239382529.21481.7.camel@localhost.localdomain> <20090411154000.GG8143@alchemy.franken.de> <1239600457.24831.8.camel@localhost.localdomain> <49E2F2FA.6000204@fgznet.ch> <1239639423.24831.85.camel@localhost.localdomain> <20090413170537.GI8143@alchemy.franken.de> <1239643406.24831.95.camel@localhost.localdomain> <20090413173528.GJ8143@alchemy.franken.de> <1239646889.24831.135.camel@localhost.localdomain> <20090414184741.GK8143@alchemy.franken.de> <49E4DF9F.1090804@fgznet.ch>
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--=-Slrhz045rl+zmU4pfCvQ Content-Type: text/plain Content-Transfer-Encoding: 7bit > >> > > > > This looks basically good, but as outlined earlier a driver > > souldn't busy-wait 50ms. Could one of you please test whether > > pause("fwlps", (50 * hz + 999) / 1000) works as a drop-in > > replacement for DELAY(50000) here? > > Works fine here! > > Thanks! > Andreas > > > Ok, time for more testing. A couple of changes here. 1. change busy DELAY() call with pause() 2. test for lps condition before pause(), if not set pause and retry. Sean --=-Slrhz045rl+zmU4pfCvQ Content-Disposition: attachment; filename="fwohci.c.diff" Content-Type: text/x-patch; name="fwohci.c.diff"; charset="UTF-8" Content-Transfer-Encoding: 7bit Index: fwohci.c =================================================================== --- fwohci.c (revision 191002) +++ fwohci.c (working copy) @@ -280,7 +280,8 @@ fun = (PHYDEV_WRCMD | (addr << PHYDEV_REGADDR) | (data << PHYDEV_WRDATA)); OWRITE(sc, OHCI_PHYACCESS, fun); - DELAY(100); + bus_space_barrier(sc->bst, sc->bsh, OHCI_PHYACCESS, + 4, BUS_SPACE_BARRIER_WRITE); return(fwphy_rddata( sc, addr)); } @@ -324,11 +325,15 @@ OWRITE(sc, FWOHCI_INTSTATCLR, OHCI_INT_REG_FAIL); fun = PHYDEV_RDCMD | (addr << PHYDEV_REGADDR); OWRITE(sc, OHCI_PHYACCESS, fun); + bus_space_barrier(sc->bst, sc->bsh, OHCI_PHYACCESS, + 4, BUS_SPACE_BARRIER_WRITE); + for ( i = 0 ; i < MAX_RETRY ; i ++ ){ fun = OREAD(sc, OHCI_PHYACCESS); + bus_space_barrier(sc->bst, sc->bsh, OHCI_PHYACCESS, + 4, BUS_SPACE_BARRIER_READ); if ((fun & PHYDEV_RDCMD) == 0 && (fun & PHYDEV_RDDONE) != 0) break; - DELAY(100); } if(i >= MAX_RETRY) { if (firewire_debug) @@ -426,20 +431,43 @@ static int fwohci_probe_phy(struct fwohci_softc *sc, device_t dev) { - uint32_t reg, reg2; + uint32_t lps, reg, reg2; + int lps_counter = 0; int e1394a = 1; -/* - * probe PHY parameters - * 0. to prove PHY version, whether compliance of 1394a. - * 1. to probe maximum speed supported by the PHY and - * number of port supported by core-logic. - * It is not actually available port on your PC . - */ + + /* + * Enable LPS(Link Power Status as per + * section 5.7 of OHCI v1.1 + * This allows PHY communication after + * a hard/soft reset + */ OWRITE(sc, OHCI_HCCCTL, OHCI_HCC_LPS); - DELAY(500); - + bus_space_barrier(sc->bst, sc->bsh, OHCI_HCCCTL, 4, BUS_SPACE_BARRIER_WRITE); + for (lps = 0, lps_counter = 0; !lps && lps_counter < 3; lps_counter++) { + lps = (OREAD(sc, OHCI_HCCCTL) & OHCI_HCC_LPS); + if (!lps) { + pause("fwlps", (50 * hz + 999) / 1000); + device_printf(dev, "lps not set, attempt(%d)\n", lps_counter); + } else + device_printf(dev, "lps(%0x) set\n", lps); + } + /* + * probe PHY parameters + * 0. to prove PHY version, whether compliance of 1394a. + * 1. to probe maximum speed supported by the PHY and + * number of port supported by core-logic. + * It is not actually available port on your PC . + */ reg = fwphy_rddata(sc, FW_PHY_SPD_REG); + /* + * ref 1394-2000 table 5B-1 + * ref 1394-1995 table J.12 + * If Extended is not set + * Assume 1394-1995 + * If Extended is set + * Assume 1394-2000(1394a) + */ if((reg >> 5) != 7 ){ sc->fc.mode &= ~FWPHYASYST; sc->fc.nport = reg & FW_PHY_NP; @@ -453,12 +481,12 @@ "Phy 1394 only %s, %d ports.\n", linkspeed[sc->fc.speed], sc->fc.nport); }else{ - reg2 = fwphy_rddata(sc, FW_PHY_ESPD_REG); sc->fc.mode |= FWPHYASYST; sc->fc.nport = reg & FW_PHY_NP; + reg2 = fwphy_rddata(sc, FW_PHY_ESPD_REG); sc->fc.speed = (reg2 & FW_PHY_ESPD) >> 5; if (sc->fc.speed > MAX_SPEED) { - device_printf(dev, "invalid speed %d (fixed to %d).\n", + device_printf(dev, "invalid extended speed %d (fixed to %d).\n", sc->fc.speed, MAX_SPEED); sc->fc.speed = MAX_SPEED; } @@ -468,11 +496,7 @@ /* check programPhyEnable */ reg2 = fwphy_rddata(sc, 5); -#if 0 - if (e1394a && (OREAD(sc, OHCI_HCCCTL) & OHCI_HCC_PRPHY)) { -#else /* XXX force to enable 1394a */ if (e1394a) { -#endif if (firewire_debug) device_printf(dev, "Enable 1394a Enhancements\n"); --=-Slrhz045rl+zmU4pfCvQ--
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