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Date:      Sat, 13 Mar 2010 23:12:05 +0200
From:      Alex RAY <ray@ddteam.net>
To:        Weongyo Jeong <weongyo@freebsd.org>
Cc:        Alexandr Rybalko <ray@dlink.ua>, current@freebsd.org, Weongyo Jeong <weongyo.jeong@gmail.com>
Subject:   Re: Call for Test and Review: bwn(4) - another Broadcom Wireless driver
Message-ID:  <20100313231205.5e68a89a.ray@ddteam.net>
In-Reply-To: <20100312231333.GZ1295@weongyo>
References:  <20091223035331.GA1293@weongyo> <4b31cb29.9413f30a.5f4a.ffff8382@mx.google.com> <20100226005115.GP14937@weongyo> <20100227011535.ed3f2486.ray@ddteam.net> <20100228095259.GB3536@weongyo> <20100301103240.3a4aac8a.ray@dlink.ua> <20100303082833.GB22865@weongyo> <20100303111014.6564ea1e.ray@dlink.ua> <20100312231333.GZ1295@weongyo>

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On Fri, 12 Mar 2010 15:13:34 -0800
Weongyo Jeong <weongyo.jeong@gmail.com> wrote:

> 
> I thought that your opinion was right and if mem is
> 0xf4000000-0xf4003fff (16 Kb) I thought the device has 4 cores.  However
> it looks this was wrong according to the below document:
> 
> 	http://voodoowarez.com/bcm5365p.pdf
> 
> Please see Section 3: PCI Core, PCI Bus (Page 34) that it indicates that
> 16Kb, maybe 8 Kb in the old devices is core register region.
> 
>   "Accesses to the lower half of the core register region are translated
>    into system backplane accesses using the PCIBAR0Window register"
>   "Accesses to offsets 0x1000 to 0x17FF of this region initiate a direct
>    access to the external SPROM"
> 
> If we just access memory using offset + core and bus_space_read_x
> interfaces it would actually not access core register region.
> 
> So without solving this problem it looks it could not remove coreswitch
> routines.
> 
> regards,
> Weongyo Jeong
> 

Hi,

this document about SoC BCM5365P, not about PCI device with PCI to SSB bridge.
I know in SoC`s like BSM5365 (I test it in BCM5354 and BCM5836) core switching is not required.

BCM5354 - http://lists.freebsd.org/pipermail/freebsd-mips/2009-June/000421.html
BCM5836 - http://lists.freebsd.org/pipermail/freebsd-mips/2010-February/000635.html

With PCI device, when device report memory window 0xf4000000-0xf4003fff, why we can`t use full window?

May be You can test your code without core switching?

-- 
Alex RAY <ray@ddteam.net>



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