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Date:      Mon, 2 Feb 2015 16:42:06 +0000
From:      "Pieper, Jeffrey E" <jeffrey.e.pieper@intel.com>
To:        Jack Vogel <jfvogel@gmail.com>, hiren panchasara <hiren@strugglingcoder.info>
Cc:        FreeBSD Net <freebsd-net@freebsd.org>
Subject:   RE: Intel 82574L (em)
Message-ID:  <2A35EA60C3C77D438915767F458D6568806C25DE@ORSMSX111.amr.corp.intel.com>
In-Reply-To: <CAFOYbcmRR_1uZsgc3CVBd52K-13U_=EZnqy%2BXPPUoCdfd8wUSQ@mail.gmail.com>
References:  <54CBF396.3090903@ignoranthack.me> <20150131010014.GB19333@strugglingcoder.info> <CAFOYbcmRR_1uZsgc3CVBd52K-13U_=EZnqy%2BXPPUoCdfd8wUSQ@mail.gmail.com>

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Iirc, we experienced issues with 82574L, where the interface will hang/die.=
 This is resolved in both FreeBSD and Linux by forcing ASPM off and disabli=
ng MSIX.

Jeff


----Original Message-----
From: owner-freebsd-net@freebsd.org [mailto:owner-freebsd-net@freebsd.org] =
On Behalf Of Jack Vogel
Sent: Friday, January 30, 2015 8:30 PM
To: hiren panchasara
Cc: FreeBSD Net
Subject: Re: Intel 82574L (em)

Yup, I wrote that :)

Sean, I will check around to see if anything may have changed in that
regard.

Jack


On Fri, Jan 30, 2015 at 5:00 PM, hiren panchasara <
hiren@strugglingcoder.info> wrote:

> On Fri, Jan 30, 2015 at 01:11:50PM -0800, Sean Bruno wrote:
> >
> > -----BEGIN PGP SIGNED MESSAGE-----
> > Hash: SHA512
> >
> >
> http://www.intel.com/content/dam/doc/datasheet/82574l-gbe-controller-data=
sheet.pdf
> >
> > According to 7.1.11, this device does indeed have 2 queues for stuff an=
d
> > or things.  So, basic RSS would be possible in something like an Atom
> box.
> >
> > I note that the em(4) driver intentionally disables this on
> > initialization.  I'm up for some science on my new shiny, soon to be
> > router box. Any reason not to default to 1 queue and allow loader.conf
> > to raise it to 2?
>
> Intel folks know better but it seems this is hartwell.
>
> em_setup_msix() in very start says:
>
>         /*
>         ** Setup MSI/X for Hartwell: tests have shown
>         ** use of two queues to be unstable, and to
>         ** provide no great gain anyway, so we simply
>         ** seperate the interrupts and use a single queue.
>         */
>
> Things may have changed now. I guess you can try enabling it and find out
> :-)
>
> cheers,
> Hiren
>
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