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Date:      Wed, 15 May 2002 11:19:16 -0700
From:      Terry Lambert <tlambert2@mindspring.com>
To:        Andrew Gallatin <gallatin@cs.duke.edu>
Cc:        Dag-Erling Smorgrav <des@ofug.org>, alpha@FreeBSD.ORG
Subject:   Re: memory management fault during netbooting on 4.6-PRERELEASE
Message-ID:  <3CE2A6A4.4F7C72A6@mindspring.com>
References:  <20020514235608.A69014@xor.obsecurity.org> <xzpg00t26ia.fsf@flood.ping.uio.no> <15586.25870.79809.901266@grasshopper.cs.duke.edu>

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Andrew Gallatin wrote:
> 
> Dag-Erling Smorgrav writes:
>  > pid 43 (dhclient): unaligned access: va=0x11fff02c pc=0x1200271d4 ra=0x1200270fc
> 
> An alpha needs to access memory in naturally aligned chunks.  If a
> load or store is done to a misaligned address (a 32-bit load from an
> address starting on a 16 bit boundary, for example).  These unaligned
> operations generate traps, and the kernel fixes up the load.  This is
> very expensive, so the default is to print a warning when it happens.
> 
> In a shell, you can use uac -s to cause programs to dump core when
> they generate an unaligned access, so that you can debug them.
> (assuming gdb worked on alpha in -current, which it doesn't; use the
> gdb52 port).  You can also shut things up by using uac -p (or sysctl
> machdep.unaligned_print=0 to disable printing system wide).

FWIW, there's a bit you can set in CR3 from the 486 on up that will
cause the same faults for unaligned access on x86 hardware.

It's worth noting that there's a performance penalty for unaligned
accesses there, too, though not as expensive as the trap+fixup on
the Alpha, it does halve the data rate through the bus by doubling
the number of bus cycles.  For a 2.5GHz processor witha 433MHz
front side bus, you are still talking ~ a factor of 6 on the CPU
slowdown when doing I/O because of the relative clock rates, so
doubling it moves it closer to a factor of 12.

-- Terry

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