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Date:      Sun, 22 Mar 2009 22:09:00 +0100
From:      Marius Strobl <marius@alchemy.franken.de>
To:        Robert Noland <rnoland@freebsd.org>
Cc:        svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org
Subject:   Re: svn commit: r190283 - head/share/man/man9
Message-ID:  <20090322210900.GE67783@alchemy.franken.de>
In-Reply-To: <200903222100.n2ML0wwG083537@svn.freebsd.org>
References:  <200903222100.n2ML0wwG083537@svn.freebsd.org>

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On Sun, Mar 22, 2009 at 09:00:58PM +0000, Robert Noland wrote:
> Author: rnoland
> Date: Sun Mar 22 21:00:58 2009
> New Revision: 190283
> URL: http://svn.freebsd.org/changeset/base/190283
> 
> Log:
>   Correct the documentation to reflect the fact that BUS_DMA_NOCACHE is a
>   flag to bus_dmamem_alloc() rather than bus_dmamap_load();
>   
>   Discussed with:	kib
>   MFC after:	3 days
> 
> Modified:
>   head/share/man/man9/bus_dma.9
> 
> Modified: head/share/man/man9/bus_dma.9
> ==============================================================================
> --- head/share/man/man9/bus_dma.9	Sun Mar 22 20:58:29 2009	(r190282)
> +++ head/share/man/man9/bus_dma.9	Sun Mar 22 21:00:58 2009	(r190283)
> @@ -561,15 +561,6 @@ Are as follows:
>  .It Dv BUS_DMA_NOWAIT
>  The load should not be deferred in case of insufficient mapping resources,
>  and instead should return immediately with an appropriate error.
> -.It Dv BUS_DMA_NOCACHE
> -The allocated memory will not be cached in the processor caches.
> -All memory accesses appear on the bus and are executed
> -without reordering.
> -On the amd64 and i386 architectures this flag results in the
> -Strong Uncacheable PAT to be set for the allocated virtual address range.
> -The
> -.Dv BUS_DMA_NOCACHE
> -flag is currently implemented on amd64, i386 and sparc64.
>  .El
>  .El
>  .Pp
> @@ -785,6 +776,15 @@ the
>  flag is currently implemented on arm and sparc64.
>  .It Dv BUS_DMA_ZERO
>  Causes the allocated memory to be set to all zeros.
> +.It Dv BUS_DMA_NOCACHE
> +The allocated memory will not be cached in the processor caches.
> +All memory accesses appear on the bus and are executed
> +without reordering.
> +On the amd64 and i386 architectures this flag results in the
> +Strong Uncacheable PAT to be set for the allocated virtual address range.
> +The
> +.Dv BUS_DMA_NOCACHE
> +flag is currently implemented on amd64, i386 and sparc64.
>  .El
>  .It Fa mapp
>  Pointer to a

Uhm, on sparc64 BUS_DMA_NOCACHE actually is only valid for
bus_dmamap_load().

Marius




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