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Date:      Tue, 14 Jan 2003 19:16:39 -0800
From:      Peter Wemm <peter@wemm.org>
To:        Josef Karthauser <joe@FreeBSD.org>
Cc:        Andrew Gallatin <gallatin@cs.duke.edu>, John Baldwin <jhb@FreeBSD.org>, Wilko Bulte <wkb@freebie.xs4all.nl>, cvs-committers@FreeBSD.org, cvs-all@FreeBSD.org, Nate Lawson <njl@FreeBSD.org>
Subject:   Re: cvs commit: src/sys/dev/acpica acpi_cpu.c 
Message-ID:  <20030115031639.A88182A89E@canning.wemm.org>
In-Reply-To: <20030115011342.GA5983@genius.tao.org.uk> 

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Josef Karthauser wrote:
> 
> --PNTmBPCT7hxwcZjr
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> 
> On Tue, Jan 14, 2003 at 03:00:57PM -0800, Peter Wemm wrote:
> 
> >=20
> > FWIW, we see a (measured) difference of about 50W on 2.2GHz P4's simply by
> > turning machdep.cpu_idle_hlt on and off.  I expect the clock throttling
> > would make similar differences.  For 1U rack-mount systems (especially in
> > California) this is a Big Deal.
> >=20
> 
> Which way's the way to reduce the power consumption?  I would guess
> 'machdep.cpu_idle_hlt=3D1', but as that appears to be the default I
> thought I'd ask.


Yes, it is the default, but for uniprocessor only.  Sorry for not being
clear.  On SMP, machdep.cpu_idle_hlt=0 since we do not do resched IPI's to
wake up the halted cpus, so this is a slight performance loss in mny cases.

What I was trying to point out was that the power consumption of P4's varies
a *HUGE* amount depending on what it is doing.  Clock tweaking should have
similar effects.

> Joe
> --=20
> Josef Karthauser (joe@tao.org.uk)	       http://www.josef-k.net/
> FreeBSD (cvs meister, admin and hacker)     http://www.uk.FreeBSD.org/
> Physics Particle Theory (student)   http://www.pact.cpes.sussex.ac.uk/
> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D An eclectic mix of fact an=
> d theory. =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
> 
> --PNTmBPCT7hxwcZjr
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> --PNTmBPCT7hxwcZjr--
> 

Cheers,
-Peter
--
Peter Wemm - peter@wemm.org; peter@FreeBSD.org; peter@yahoo-inc.com
"All of this is for nothing if we don't go to the stars" - JMS/B5


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